From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 4 Oct 2022 01:55:28 +0000 (+0100)
Subject: formatting
X-Git-Tag: opf_rfc_ls005_v1~201
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=042c3858e65addb51324cbac0456185c1d2ae624;p=libreriscv.git

formatting
---

diff --git a/openpower/sv/svp64/discussion.mdwn b/openpower/sv/svp64/discussion.mdwn
index 5403fb852..700454c19 100644
--- a/openpower/sv/svp64/discussion.mdwn
+++ b/openpower/sv/svp64/discussion.mdwn
@@ -352,6 +352,7 @@ constantly varying element sizes (and therefore vector lengths too)
 without needing setvl every few instructions.
 
 Examples of use cases:
+
 * WebAssembly's [128-bit packed SIMD extension](https://github.com/WebAssembly/spec/blob/8a352708cffeb71206ca49a0f743bdc57269fb1a/proposals/simd/SIMD.md) (which is becoming a de-facto standard for WebAssembly on the Web and on Servers)
 * Java/C#/JavaScript/etc. 128-bit packed SIMD
 * Cross-compiling x86 SSE2/AVX2 or ARM NEON or VSX/VMX code to SVP64.