From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 3 Oct 2023 10:02:06 +0000 (+0100)
Subject: Added English Language description for stwu instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0442e2fdf25ba2c50ffd8fe927371ac9c5e32c84;p=openpower-isa.git

Added English Language description for stwu instruction
---

diff --git a/openpower/isa/fixedstore.mdwn b/openpower/isa/fixedstore.mdwn
index d12fcbb5..fba96644 100644
--- a/openpower/isa/fixedstore.mdwn
+++ b/openpower/isa/fixedstore.mdwn
@@ -262,6 +262,16 @@ Pseudo-code:
     MEM(EA, 4) <- (RS)[XLEN-32:XLEN-1]
     RA <- EA
 
+Description:
+
+Let the effective address (EA) be the sum (RA)+ D.
+RS[32:63] are stored into the word in storage addressed
+by EA.
+
+EA is placed into register RA.
+
+If RA=0, the instruction form is invalid.
+
 Special Registers Altered:
 
     None