From: lkcl <lkcl@web>
Date: Wed, 26 Apr 2023 11:18:11 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=047587177bb793c36ea021aed4cbbb90b82fcfae;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls007.mdwn b/openpower/sv/rfc/ls007.mdwn
index ae135b41d..4c3f93e82 100644
--- a/openpower/sv/rfc/ls007.mdwn
+++ b/openpower/sv/rfc/ls007.mdwn
@@ -69,7 +69,7 @@ GPR, CR-Field, bit-manipulation, ternary, binary, dynamic, look-up-table
 * `crternlogi` is like `ternlogi` except it works with CRs instead of GPRs.
 * `crbinlog` is like `binlog` except it works with CRs instead of GPRs. Likewise it
    is similar to a Programmable LUT in an FPGA.
-* Combined these instructions save on insttuction count and also help accelerate
+* Combined these instructions save on instruction count and also help accelerate
   AI and JIT runtimes.
 
 **Notes and Observations**: