From: lkcl Date: Sat, 23 Jan 2021 17:03:42 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~376 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=047d88c2d8bcb8d0d41b386b6d053a2ad5138a31;p=libreriscv.git --- diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn index 27d45ff44..1d2c7409a 100644 --- a/openpower/sv/implementation.mdwn +++ b/openpower/sv/implementation.mdwn @@ -36,6 +36,8 @@ These are prerequisite tasks: - needs remote gdb first https://github.com/gem5/gem5/blob/stable/src/arch/riscv/remote_gdb.cc * c++, c and python macros for generating [[sv/svp64]] assembler (svp64 prefixes) + - python svp64 underway, minimalist sufficient for FU unit tests + People coordinating different tasks. This doesn't mean exclusive work on these areas it just means they are the "coordinator" and lead: