From: Luke Kenneth Casson Leighton Date: Thu, 24 Dec 2020 15:20:10 +0000 (+0000) Subject: corrections to sv_analysis svp64 tables X-Git-Tag: convert-csv-opcode-to-binary~947 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=04db971be3880bdbe3764f07ff0870f28771779c;p=libreriscv.git corrections to sv_analysis svp64 tables --- diff --git a/openpower/opcode_regs_deduped.mdwn b/openpower/opcode_regs_deduped.mdwn index a1deafce9..c4e5999aa 100644 --- a/openpower/opcode_regs_deduped.mdwn +++ b/openpower/opcode_regs_deduped.mdwn @@ -706,10 +706,10 @@ stdcix | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NON [[!table data=""" insn | Ptype | Etype | 0 | 1 | 2 | 3 | -stwcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | -stdcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | -stbcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | -sthcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +stwcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +stdcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +stbcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +sthcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | """]] ## LDST-3R-1W (LDSTRM-2P-2S1D) diff --git a/openpower/sv_analysis.py b/openpower/sv_analysis.py index 24b26dab9..6fcf18f2d 100644 --- a/openpower/sv_analysis.py +++ b/openpower/sv_analysis.py @@ -403,7 +403,10 @@ def process_csvs(): elif value == 'LDSTRM-2P-3S': res['Etype'] = 'EXTRA2' # RM EXTRA2 type - res['0'] = 's:RS' # RS: Rsrc1_EXTRA2 CR0: dest + if 'cx' in insn_name: + res['0'] = 's:RS,d:CR0' # RS: Rsrc1_EXTRA2 CR0: dest + else: + res['0'] = 's:RS' # RS: Rsrc1_EXTRA2 res['1'] = 's:RA' # RA: Rsrc2_EXTRA2 res['2'] = 's:RB' # RA: Rsrc3_EXTRA2