From: Jan Beulich <jbeulich@suse.com>
Date: Wed, 18 May 2022 15:55:55 +0000 (+0200)
Subject: Arm64: follow-on to PR gas/27217 fix
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=04dfe7aa5217;p=binutils-gdb.git

Arm64: follow-on to PR gas/27217 fix

PR gas/27217

Prior to trying to address PR gas/28888 I noticed anomalies in how
certain insns would / wouldn't be affected in similar ways.

Commit eac4eb8ecb26 ("Fix a problem assembling AArch64 sources when a
relocation is generated against a symbol that has a defined value") had
two copy-and-paste mistakes, passing the wrong type to
aarch64_force_reloc().

It further failed to add placeholder relocation types to that function's
block of case labels leading to a return of 1. While not of interest for
aarch64_force_relocation() (these placeholders are resolved right in
parse_operands()), calls to aarch64_force_reloc() happen before that
resolution would take place.
---

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index dee7d19d94a..407f8881493 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3097,6 +3097,7 @@ aarch64_force_reloc (unsigned int type)
     case BFD_RELOC_AARCH64_LDST32_LO12:
     case BFD_RELOC_AARCH64_LDST64_LO12:
     case BFD_RELOC_AARCH64_LDST8_LO12:
+    case BFD_RELOC_AARCH64_LDST_LO12:
     case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
     case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
@@ -3130,6 +3131,8 @@ aarch64_force_reloc (unsigned int type)
     case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
@@ -3143,6 +3146,8 @@ aarch64_force_reloc (unsigned int type)
     case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12:
+    case BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@@ -3652,7 +3657,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand,
 
 	  /* #:<reloc_op>:  */
 	  if (! aarch64_get_expression (exp, &p, GE_NO_PREFIX, REJECT_ABSENT,
-					aarch64_force_reloc (entry->add_type) == 1))
+					aarch64_force_reloc (ty) == 1))
 	    {
 	      set_syntax_error (_("invalid relocation expression"));
 	      return false;
@@ -3776,7 +3781,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand,
 	         the name in the assembler source.  Next, we parse the
 	         expression.  */
 	      if (! aarch64_get_expression (exp, &p, GE_NO_PREFIX, REJECT_ABSENT,
-					    aarch64_force_reloc (entry->add_type) == 1))
+					    aarch64_force_reloc (entry->ldst_type) == 1))
 		{
 		  set_syntax_error (_("invalid relocation expression"));
 		  return false;