From: Richard Biener <rguenther@suse.de>
Date: Mon, 23 Jan 2017 12:24:35 +0000 (+0000)
Subject: re PR testsuite/78421 (vect-strided-a-u8-i2-gap.c fails on armeb)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=050116183b0368ecc4daf8b73d13627de6a11824;p=gcc.git

re PR testsuite/78421 (vect-strided-a-u8-i2-gap.c fails on armeb)

	PR testsuite/78421
	* lib/target-supports.exp (check_effective_target_vect_hw_misalign):
	If the target is ARM return the result of the
	check_effective_target_arm_vect_no_misalign proc.
	* gcc.dg/vect/vect-strided-a-u8-i2-gap.c: If the target does not
	support unaligned vectors then only expect one of the loops to be
	unrolled.

Co-Authored-By: Nick Clifton <nickc@redhat.com>

From-SVN: r244796
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0ebaae5035c..cafb05882c2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2017-01-23  Richard Biener  <rguenther@suse.de>
+	    Nick Clifton  <nickc@redhat.com>
+
+	PR testsuite/78421
+	* lib/target-supports.exp (check_effective_target_vect_hw_misalign):
+	If the target is ARM return the result of the
+	check_effective_target_arm_vect_no_misalign proc.
+	* gcc.dg/vect/vect-strided-a-u8-i2-gap.c: If the target does not
+	support unaligned vectors then only expect one of the loops to be
+	unrolled.
+
 2017-01-23  Martin Liska  <mliska@suse.cz>
 
 	* gcc.dg/asan/use-after-scope-10.c: New test.
diff --git a/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c b/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c
index 52fdcf6ee7d..0be7f8b9b78 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c
@@ -71,5 +71,6 @@ int main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  { target vect_strided2 } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target { vect_strided2 && { ! vect_hw_misalign } } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  { target { vect_strided2 && vect_hw_misalign } } } } */
   
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index e1d6dcbf088..95a1c500c28 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5752,6 +5752,9 @@ proc check_effective_target_vect_hw_misalign { } {
 	     || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
 	  set et_vect_hw_misalign_saved($et_index) 1
 	}
+	if { [istarget arm*-*-*] } {
+	    set et_vect_hw_misalign_saved($et_index) [check_effective_target_arm_vect_no_misalign]
+	}
     }
     verbose "check_effective_target_vect_hw_misalign:\
 	     returning $et_vect_hw_misalign_saved($et_index)" 2