From: Lionel Landwerlin Date: Tue, 25 Jul 2017 16:17:48 +0000 (+0100) Subject: i965: perf: make revision variable available X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=05231a4e740090f2e1eed720ac5d183125117267;p=mesa.git i965: perf: make revision variable available This will be used in the next commit to build up register programming. Signed-off-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 3bee3e99ed2..0960d635beb 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1087,6 +1087,7 @@ struct brw_context uint64_t subslice_mask; /** $SubsliceMask */ uint64_t gt_min_freq; /** $GpuMinFrequency */ uint64_t gt_max_freq; /** $GpuMaxFrequency */ + uint64_t revision; /** $SkuRevisionId */ } sys_vars; /* OA metric sets, indexed by GUID, as know by Mesa at build time, diff --git a/src/mesa/drivers/dri/i965/brw_oa.py b/src/mesa/drivers/dri/i965/brw_oa.py index 254c512a7da..91f7ecb5731 100644 --- a/src/mesa/drivers/dri/i965/brw_oa.py +++ b/src/mesa/drivers/dri/i965/brw_oa.py @@ -175,6 +175,7 @@ hw_vars["$SubsliceMask"] = "brw->perfquery.sys_vars.subslice_mask" hw_vars["$GpuTimestampFrequency"] = "brw->perfquery.sys_vars.timestamp_frequency" hw_vars["$GpuMinFrequency"] = "brw->perfquery.sys_vars.gt_min_freq" hw_vars["$GpuMaxFrequency"] = "brw->perfquery.sys_vars.gt_max_freq" +hw_vars["$SkuRevisionId"] = "brw->perfquery.sys_vars.revision" def output_rpn_equation_code(set, counter, equation, counter_vars): c("/* RPN equation: " + equation + " */") diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c index d8680b48793..4b585c95b7d 100644 --- a/src/mesa/drivers/dri/i965/brw_performance_query.c +++ b/src/mesa/drivers/dri/i965/brw_performance_query.c @@ -1812,6 +1812,7 @@ init_oa_sys_vars(struct brw_context *brw, const char *sysfs_dev_dir) { const struct gen_device_info *devinfo = &brw->screen->devinfo; uint64_t min_freq_mhz = 0, max_freq_mhz = 0; + __DRIscreen *screen = brw->screen->driScrnPriv; if (!read_sysfs_drm_device_file_uint64(brw, sysfs_dev_dir, "gt_min_freq_mhz", @@ -1826,6 +1827,8 @@ init_oa_sys_vars(struct brw_context *brw, const char *sysfs_dev_dir) brw->perfquery.sys_vars.gt_min_freq = min_freq_mhz * 1000000; brw->perfquery.sys_vars.gt_max_freq = max_freq_mhz * 1000000; brw->perfquery.sys_vars.timestamp_frequency = devinfo->timestamp_frequency; + + brw->perfquery.sys_vars.revision = intel_device_get_revision(screen->fd); brw->perfquery.sys_vars.n_eu_slices = devinfo->num_slices; /* Assuming uniform distribution of subslices per slices. */ brw->perfquery.sys_vars.n_eu_sub_slices = devinfo->num_subslices[0]; @@ -1848,7 +1851,6 @@ init_oa_sys_vars(struct brw_context *brw, const char *sysfs_dev_dir) } else unreachable("not reached"); } else { - __DRIscreen *screen = brw->screen->driScrnPriv; drm_i915_getparam_t gp; int ret; int slice_mask = 0; diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 10064c32361..cdc36adc787 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -2129,14 +2129,9 @@ set_max_gl_versions(struct intel_screen *screen) /** * Return the revision (generally the revid field of the PCI header) of the * graphics device. - * - * XXX: This function is useful to keep around even if it is not currently in - * use. It is necessary for new platforms and revision specific workarounds or - * features. Please don't remove it so that we know it at least continues to - * build. */ -static __attribute__((__unused__)) int -brw_get_revision(int fd) +int +intel_device_get_revision(int fd) { struct drm_i915_getparam gp; int revision; diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h index 41e1dbdd4e9..7948617b7f0 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.h +++ b/src/mesa/drivers/dri/i965/intel_screen.h @@ -136,6 +136,9 @@ double get_time(void); const int* intel_supported_msaa_modes(const struct intel_screen *screen); +int +intel_device_get_revision(int fd); + static inline bool can_do_pipelined_register_writes(const struct intel_screen *screen) {