From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 11 Sep 2021 14:37:46 +0000 (+0100)
Subject: update README.txt to add extra notes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=057a741d55f5b113f405203fb9c0452a1dc95817;p=libresoc-litex.git

update README.txt to add extra notes
---

diff --git a/README.txt b/README.txt
index 2cab663..56adddf 100644
--- a/README.txt
+++ b/README.txt
@@ -1,11 +1,15 @@
 # sim openocd test
 
-create verilog file "python issuer_verilog libresoc.v"
+in the soc directory, create the verilog file
+    "python issuer_verilog.py libresoc.v"
+
 copy to libresoc/ directory
 terminal 1: ./sim.py
 terminal 2: openocd -f openocd.cfg -c init -c 'svf idcode_test2.svf'
 
 # ecp5 build
 
+same thing: first build libresoc.v and copy it to the libresoc/ directory
+
 ./versa_ecp5.py --sys-clk-freq=55e6 --build
 ./versa_ecp5.py --sys-clk-freq=55e6 --load