From: Eric Botcazou <ebotcazou@adacore.com>
Date: Mon, 7 Dec 2015 16:45:45 +0000 (+0000)
Subject: re PR middle-end/68291 (ICE in emit_move_insn, at expr.c:3540)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=058c6384fe443310b1788dcdc8880beba24d6b43;p=gcc.git

re PR middle-end/68291 (ICE in emit_move_insn, at expr.c:3540)

	PR middle-end/68291
	PR middle-end/68292
	* cfgexpand.c (set_rtl): Always accept PARALLELs with BLKmode for
	SSA names based on RESULT_DECLs.
	* function.c (expand_function_start): Do not create BLKmode REGs
	for GIMPLE registers when coalescing is enabled.

From-SVN: r231372
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e547c6294a2..abd648e3ce5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,7 +1,15 @@
+2015-12-07  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR middle-end/68291
+	PR middle-end/68292
+	* cfgexpand.c (set_rtl): Always accept PARALLELs with BLKmode for
+	SSA names based on RESULT_DECLs.
+	* function.c (expand_function_start): Do not create BLKmode REGs
+	for GIMPLE registers when coalescing is enabled.
+
 2015-12-07  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 
 	* final.c (shorten_branches): Fix check for basic asm.
-
 	* ipa-icf-gimple.c (func_checker::compare_gimple_asm): Add check for
 	basic asm.
 
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 0cf417270e9..5338c251b46 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -184,10 +184,15 @@ set_rtl (tree t, rtx x)
 				      || SUBREG_P (XEXP (x, 0)))
 				  && (REG_P (XEXP (x, 1))
 				      || SUBREG_P (XEXP (x, 1))))
+			      /* We need to accept PARALLELs for RESUT_DECLs
+				 because of vector types with BLKmode returned
+				 in multiple registers, but they are supposed
+				 to be uncoalesced.  */
 			      || (GET_CODE (x) == PARALLEL
 				  && SSAVAR (t)
 				  && TREE_CODE (SSAVAR (t)) == RESULT_DECL
-				  && !flag_tree_coalesce_vars))
+				  && (GET_MODE (x) == BLKmode
+				      || !flag_tree_coalesce_vars)))
 			   : (MEM_P (x) || x == pc_rtx
 			      || (GET_CODE (x) == CONCAT
 				  && MEM_P (XEXP (x, 0))
diff --git a/gcc/function.c b/gcc/function.c
index e4528655917..b513eada68c 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -5148,15 +5148,16 @@ expand_function_start (tree subr)
       /* Compute the return values into a pseudo reg, which we will copy
 	 into the true return register after the cleanups are done.  */
       tree return_type = TREE_TYPE (res);
-      /* If we may coalesce this result, make sure it has the expected
-	 mode.  */
-      if (flag_tree_coalesce_vars && is_gimple_reg (res))
-	{
-	  tree def = ssa_default_def (cfun, res);
-	  gcc_assert (def);
-	  machine_mode mode = promote_ssa_mode (def, NULL);
-	  set_parm_rtl (res, gen_reg_rtx (mode));
-	}
+
+      /* If we may coalesce this result, make sure it has the expected mode
+	 in case it was promoted.  But we need not bother about BLKmode.  */
+      machine_mode promoted_mode
+	= flag_tree_coalesce_vars && is_gimple_reg (res)
+	  ? promote_ssa_mode (ssa_default_def (cfun, res), NULL)
+	  : BLKmode;
+
+      if (promoted_mode != BLKmode)
+	set_parm_rtl (res, gen_reg_rtx (promoted_mode));
       else if (TYPE_MODE (return_type) != BLKmode
 	       && targetm.calls.return_in_msb (return_type))
 	/* expand_function_end will insert the appropriate padding in