From: Andrey Miroshnikov <andrey@technepisteme.xyz>
Date: Mon, 6 Nov 2023 18:53:44 +0000 (+0000)
Subject: Add remap insn breakdown, simulator example
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=05ccb75bebd8956aa3f0361bcea8c34e6a86d04b;p=libreriscv.git

Add remap insn breakdown, simulator example
---

diff --git a/openpower/sv/cookbook/mat_mul_sim_results.png b/openpower/sv/cookbook/mat_mul_sim_results.png
new file mode 100644
index 000000000..6529d447d
Binary files /dev/null and b/openpower/sv/cookbook/mat_mul_sim_results.png differ
diff --git a/openpower/sv/cookbook/remap_matrix.mdwn b/openpower/sv/cookbook/remap_matrix.mdwn
index e28b99fb4..548ab286a 100644
--- a/openpower/sv/cookbook/remap_matrix.mdwn
+++ b/openpower/sv/cookbook/remap_matrix.mdwn
@@ -322,10 +322,34 @@ Table form
 
 ## SVREMAP
 
+SVRM-Form:
+
+|0     |6     |11  |13   |15   |17   |19   |21    | 22:25 |26:31  |
+| --   | --   | -- | --  | --  | --  | --  | --   | ----  | ----- |
+| PO   | SVme |mi0 | mi1 | mi2 | mo0 | mo1 | pst  | rsvd  | XO    |
+
+* svremap SVme,mi0,mi1,mi2,mo0,mo1,pst
+
 ```
     svremap 31, 1, 2, 3, 0, 0, 0
 ```
 
+breakdown:
+
+- `SVme=31`, 5-bit bitmask determines which registers have REMAP applied.
+Bitfields are: `RA|RB|RC|RT|EA/FRS` In this example, all input registers
+(RA, RB, RC) of *any* scalar instruction to follow and output register (RT)
+will have REMAP applied.
+- `mix/mox` fields determine which shape is applied to the activated register
+- `mi0=1`, instruction operand RA has SVSHAPE1 applied to it.
+- `mi1=2`, instruction operand RB has SVSHAPE2 applied to it.
+- `mi2=3`, instruction operand RA has SVSHAPE3 applied to it.
+- `mo0=0`, instruction result RT has SVSHAPE0 applied to it.
+- `mo1=0`, instruction result EA/FRS has SVSHAPE0 applied to it. *(not applicable
+for this example)*
+- `pst=0`, if set, REMAP remains enabled until explicitly disabled, or another
+REMAP, or setvl is setup.
+
 Assigns the configured SVSHAPEs to the relevant operand/result registers
 of the consecutive instruction/s (depending on if REMAP is set to persistent).
 
@@ -347,6 +371,30 @@ an accumulator.
 
 ## Appendix
 
+### Running the simulator test case
+
+- Set up the LibreSOC development environment (need to have openpower-isa repo
+setup and installed).
+
+    $: cd /PATH/TO/src/openpower-isa/src/openpower/decoder/isa/
+    $: python3 test_caller_svp64_matrix.py >& /tmp/f
+
+(All test cases are enabled by default; extra test cases can be disabled by changing
+`test_` to `tst_` or any other prefix.)
+
+The simulator dump will be stored as in the temporary directory.
+
+Particular text strings to to search for:
+
+- `shape remap` - shows the indices corresponding to the operand and result matrices
+- `flattened X,Y,expected` - shows the expected matrix result which will be used to
+validate the result coming from the simulator.
+- `maddld-matrix` - shows the result matrix element values coming from the simulator.
+These values must match the expect result calculated before the simulator call.
+
+Screenshots:
+
+[[!img mat_mul_sim_results.png size="600x" ]]
 
 [[!tag svp64_cookbook ]]