From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 7 Feb 2015 23:01:51 +0000 (+0100)
Subject: Added SigSpec::has_const()
X-Git-Tag: yosys-0.5~19
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=05d4223fb675ee063ded20cf24eb922c4570634a;p=yosys.git

Added SigSpec::has_const()
---

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index b1e2c0e8e..776625b9c 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -1078,6 +1078,7 @@ void RTLIL::Module::check()
 
 	for (auto &it : connections_) {
 		log_assert(it.first.size() == it.second.size());
+		log_assert(!it.first.has_const());
 		it.first.check();
 		it.second.check();
 	}
@@ -2968,6 +2969,17 @@ bool RTLIL::SigSpec::is_fully_undef() const
 	return true;
 }
 
+bool RTLIL::SigSpec::has_const() const
+{
+	cover("kernel.rtlil.sigspec.has_const");
+
+	pack();
+	for (auto it = chunks_.begin(); it != chunks_.end(); it++)
+		if (it->width > 0 && it->wire == NULL)
+			return true;
+	return false;
+}
+
 bool RTLIL::SigSpec::has_marked_bits() const
 {
 	cover("kernel.rtlil.sigspec.has_marked_bits");
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 985bffe5e..dd40e2fba 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -672,6 +672,7 @@ public:
 	bool is_fully_const() const;
 	bool is_fully_def() const;
 	bool is_fully_undef() const;
+	bool has_const() const;
 	bool has_marked_bits() const;
 
 	bool as_bool() const;