From: Matt Turner Date: Tue, 2 Dec 2014 20:30:27 +0000 (-0800) Subject: i965: Change the type of booleans to D. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=05e2578cac608ba703d188fdff4903b92dec4aed;p=mesa.git i965: Change the type of booleans to D. This is a revert of commit 4656c14e ("i965/fs: Change the type of booleans to UD and emit correct immediates") plus some small additional fixes, like casting ctx->Const.UniformBooleanTrue to int and changing UD to D in the ir_unop_b2f cases. Note that it's safe to leave 0x3f800000 as UD and as a literal it's more recognizable than 1065353216. Reviewed-by: Jason Ekstrand --- diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 62ef8537e4a..13673ca8d9b 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -538,7 +538,7 @@ fs_visitor::visit(ir_expression *ir) if (ctx->Const.UniformBooleanTrue != 1) { emit(NOT(this->result, op[0])); } else { - emit(XOR(this->result, op[0], fs_reg(1u))); + emit(XOR(this->result, op[0], fs_reg(1))); } break; case ir_unop_neg: @@ -820,13 +820,13 @@ fs_visitor::visit(ir_expression *ir) break; case ir_unop_b2f: if (ctx->Const.UniformBooleanTrue != 1) { - op[0].type = BRW_REGISTER_TYPE_UD; - this->result.type = BRW_REGISTER_TYPE_UD; + op[0].type = BRW_REGISTER_TYPE_D; + this->result.type = BRW_REGISTER_TYPE_D; emit(AND(this->result, op[0], fs_reg(0x3f800000u))); this->result.type = BRW_REGISTER_TYPE_F; } else { temp = fs_reg(this, glsl_type::int_type); - emit(AND(temp, op[0], fs_reg(1u))); + emit(AND(temp, op[0], fs_reg(1))); emit(MOV(this->result, temp)); } break; @@ -2348,8 +2348,8 @@ fs_visitor::visit(ir_constant *ir) break; case GLSL_TYPE_BOOL: emit(MOV(dst_reg, - fs_reg(ir->value.b[i] != 0 ? ctx->Const.UniformBooleanTrue - : 0u))); + fs_reg(ir->value.b[i] != 0 ? (int)ctx->Const.UniformBooleanTrue + : 0))); break; default: unreachable("Non-float/uint/int/bool constant"); @@ -2397,7 +2397,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir) if (ctx->Const.UniformBooleanTrue == 1) { fs_reg dst = fs_reg(this, glsl_type::uint_type); emit(XOR(dst, op[0], op[1])); - inst = emit(AND(reg_null_d, dst, fs_reg(1u))); + inst = emit(AND(reg_null_d, dst, fs_reg(1))); inst->conditional_mod = BRW_CONDITIONAL_NZ; } else { inst = emit(XOR(reg_null_d, op[0], op[1])); @@ -2409,7 +2409,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir) if (ctx->Const.UniformBooleanTrue == 1) { fs_reg dst = fs_reg(this, glsl_type::uint_type); emit(OR(dst, op[0], op[1])); - inst = emit(AND(reg_null_d, dst, fs_reg(1u))); + inst = emit(AND(reg_null_d, dst, fs_reg(1))); inst->conditional_mod = BRW_CONDITIONAL_NZ; } else { inst = emit(OR(reg_null_d, op[0], op[1])); @@ -2421,7 +2421,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir) if (ctx->Const.UniformBooleanTrue == 1) { fs_reg dst = fs_reg(this, glsl_type::uint_type); emit(AND(dst, op[0], op[1])); - inst = emit(AND(reg_null_d, dst, fs_reg(1u))); + inst = emit(AND(reg_null_d, dst, fs_reg(1))); inst->conditional_mod = BRW_CONDITIONAL_NZ; } else { inst = emit(AND(reg_null_d, op[0], op[1])); @@ -3421,7 +3421,7 @@ fs_visitor::resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg) return; fs_reg temp = fs_reg(this, glsl_type::bool_type); - emit(AND(temp, *reg, fs_reg(1u))); + emit(AND(temp, *reg, fs_reg(1))); *reg = temp; } diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index a53b63a0034..183a4f16191 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -275,8 +275,8 @@ brw_type_for_base_type(const struct glsl_type *type) case GLSL_TYPE_FLOAT: return BRW_REGISTER_TYPE_F; case GLSL_TYPE_INT: - return BRW_REGISTER_TYPE_D; case GLSL_TYPE_BOOL: + return BRW_REGISTER_TYPE_D; case GLSL_TYPE_UINT: return BRW_REGISTER_TYPE_UD; case GLSL_TYPE_ARRAY: diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 70ee2c5e629..a2c05eda14d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -1325,7 +1325,7 @@ vec4_visitor::visit(ir_expression *ir) if (ctx->Const.UniformBooleanTrue != 1) { emit(NOT(result_dst, op[0])); } else { - emit(XOR(result_dst, op[0], src_reg(1u))); + emit(XOR(result_dst, op[0], src_reg(1))); } break; case ir_unop_neg: @@ -1515,7 +1515,7 @@ vec4_visitor::visit(ir_expression *ir) emit(CMP(result_dst, op[0], op[1], brw_conditional_for_comparison(ir->operation))); if (ctx->Const.UniformBooleanTrue == 1) { - emit(AND(result_dst, result_src, src_reg(1u))); + emit(AND(result_dst, result_src, src_reg(1))); } break; } @@ -1526,12 +1526,12 @@ vec4_visitor::visit(ir_expression *ir) ir->operands[1]->type->is_vector()) { emit(CMP(dst_null_d(), op[0], op[1], BRW_CONDITIONAL_Z)); emit(MOV(result_dst, src_reg(0))); - inst = emit(MOV(result_dst, src_reg(ctx->Const.UniformBooleanTrue))); + inst = emit(MOV(result_dst, src_reg((int)ctx->Const.UniformBooleanTrue))); inst->predicate = BRW_PREDICATE_ALIGN16_ALL4H; } else { emit(CMP(result_dst, op[0], op[1], BRW_CONDITIONAL_Z)); if (ctx->Const.UniformBooleanTrue == 1) { - emit(AND(result_dst, result_src, src_reg(1u))); + emit(AND(result_dst, result_src, src_reg(1))); } } break; @@ -1542,12 +1542,12 @@ vec4_visitor::visit(ir_expression *ir) emit(CMP(dst_null_d(), op[0], op[1], BRW_CONDITIONAL_NZ)); emit(MOV(result_dst, src_reg(0))); - inst = emit(MOV(result_dst, src_reg(ctx->Const.UniformBooleanTrue))); + inst = emit(MOV(result_dst, src_reg((int)ctx->Const.UniformBooleanTrue))); inst->predicate = BRW_PREDICATE_ALIGN16_ANY4H; } else { emit(CMP(result_dst, op[0], op[1], BRW_CONDITIONAL_NZ)); if (ctx->Const.UniformBooleanTrue == 1) { - emit(AND(result_dst, result_src, src_reg(1u))); + emit(AND(result_dst, result_src, src_reg(1))); } } break; @@ -1556,7 +1556,7 @@ vec4_visitor::visit(ir_expression *ir) emit(CMP(dst_null_d(), op[0], src_reg(0), BRW_CONDITIONAL_NZ)); emit(MOV(result_dst, src_reg(0))); - inst = emit(MOV(result_dst, src_reg(ctx->Const.UniformBooleanTrue))); + inst = emit(MOV(result_dst, src_reg((int)ctx->Const.UniformBooleanTrue))); inst->predicate = BRW_PREDICATE_ALIGN16_ANY4H; break; @@ -1611,15 +1611,15 @@ vec4_visitor::visit(ir_expression *ir) break; case ir_unop_b2i: if (ctx->Const.UniformBooleanTrue != 1) { - emit(AND(result_dst, op[0], src_reg(1u))); + emit(AND(result_dst, op[0], src_reg(1))); } else { emit(MOV(result_dst, op[0])); } break; case ir_unop_b2f: if (ctx->Const.UniformBooleanTrue != 1) { - op[0].type = BRW_REGISTER_TYPE_UD; - result_dst.type = BRW_REGISTER_TYPE_UD; + op[0].type = BRW_REGISTER_TYPE_D; + result_dst.type = BRW_REGISTER_TYPE_D; emit(AND(result_dst, op[0], src_reg(0x3f800000u))); result_dst.type = BRW_REGISTER_TYPE_F; } else { @@ -1630,7 +1630,7 @@ vec4_visitor::visit(ir_expression *ir) case ir_unop_i2b: emit(CMP(result_dst, op[0], src_reg(0.0f), BRW_CONDITIONAL_NZ)); if (ctx->Const.UniformBooleanTrue == 1) { - emit(AND(result_dst, result_src, src_reg(1u))); + emit(AND(result_dst, result_src, src_reg(1))); } break; @@ -1778,7 +1778,7 @@ vec4_visitor::visit(ir_expression *ir) emit(CMP(result_dst, packed_consts, src_reg(0u), BRW_CONDITIONAL_NZ)); if (ctx->Const.UniformBooleanTrue == 1) { - emit(AND(result_dst, result, src_reg(1u))); + emit(AND(result_dst, result, src_reg(1))); } } else { emit(MOV(result_dst, packed_consts)); @@ -2310,8 +2310,8 @@ vec4_visitor::emit_constant_values(dst_reg *dst, ir_constant *ir) break; case GLSL_TYPE_BOOL: emit(MOV(*dst, - src_reg(ir->value.b[i] != 0 ? ctx->Const.UniformBooleanTrue - : 0u))); + src_reg(ir->value.b[i] != 0 ? (int)ctx->Const.UniformBooleanTrue + : 0))); break; default: unreachable("Non-float/uint/int/bool constant");