From: lkcl <lkcl@web>
Date: Tue, 7 Jun 2022 10:58:45 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1923
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=05f5dd742a25c1f0a685c25d01169ad97e2678f3;p=libreriscv.git

---

diff --git a/openpower/sv/compliancy_levels.mdwn b/openpower/sv/compliancy_levels.mdwn
new file mode 100644
index 000000000..abba7bf4a
--- /dev/null
+++ b/openpower/sv/compliancy_levels.mdwn
@@ -0,0 +1,18 @@
+[[!tag standards]]
+
+# Simple-V Compliancy Levels
+
+The purpose of the Compliancy Levels is to provide a documented
+stable base for implementors to achieve software interoperability
+without requiring a high and unnecessary hardware cost.  The bare
+minimum requirement, particularly suited for Ultra-embedded, requires
+just two instructions, reservation of SPRs, and the rest may entirely
+be Soft-emulated by raising Illegal Instruction traps.  At the other
+end of the spectrum is the full REMAP Structure Packing suitable
+for traditional Vector Processing workloads and High-performance
+energy-efficient DSP workloads.
+
+To achieve full soft-emulated interoperability, all implementations
+**must**, at the bare minimum, raise Illegal Instruction traps for
+all SPRs including all reserved SPRs, all SVP64-related Context
+instructions (REMAP), as well as for the entire SVP64 Prefix space.