From: Quan Nguyen <quannguyen@berkeley.edu>
Date: Sat, 30 Nov 2013 04:10:46 +0000 (-0800)
Subject: Add vsetprec instruction prototype
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=05f9118e82283a6225534098487fa2011d065fd1;p=riscv-isa-sim.git

Add vsetprec instruction prototype
---

diff --git a/hwacha/decode_hwacha.h b/hwacha/decode_hwacha.h
index b7069fa..badf750 100644
--- a/hwacha/decode_hwacha.h
+++ b/hwacha/decode_hwacha.h
@@ -20,6 +20,7 @@
 #define WRITE_VL(vlnext) (h->get_ct_state()->vl = (vlnext))
 #define WRITE_UTIDX(value) (h->get_ct_state()->count = (value))
 #define WRITE_VF_PC(pcnext) (h->get_ct_state()->vf_pc = (pcnext))
+#define WRITE_PREC(precision) (h->get_ct_state()->prec = (precision))
 
 #define INSN_RS1 (insn.rs1())
 #define INSN_RS2 (insn.rs2())
diff --git a/hwacha/hwacha.cc b/hwacha/hwacha.cc
index 8caf91e..1a89d73 100644
--- a/hwacha/hwacha.cc
+++ b/hwacha/hwacha.cc
@@ -11,6 +11,7 @@ void ct_state_t::reset()
   maxvl = 32;
   vl = 0;
   count = 0;
+  prec = 64;
 
   vf_pc = -1;
 }
diff --git a/hwacha/hwacha.h b/hwacha/hwacha.h
index df0add3..bbdd7c7 100644
--- a/hwacha/hwacha.h
+++ b/hwacha/hwacha.h
@@ -12,6 +12,7 @@ struct ct_state_t
   uint32_t maxvl;
   uint32_t vl;
   uint32_t count;
+  uint32_t prec;
 
   reg_t vf_pc;
 };
diff --git a/hwacha/insns/vsetprec.h b/hwacha/insns/vsetprec.h
new file mode 100644
index 0000000..b36f27c
--- /dev/null
+++ b/hwacha/insns/vsetprec.h
@@ -0,0 +1,13 @@
+uint32_t prec = u.r.funct;
+switch (prec) {
+  case 16:
+  case 32:
+  case 64:
+    printf("Precision set to %d bits\n", prec);
+    WRITE_PREC(prec);
+    break;
+
+  default:
+    h->take_exception(HWACHA_CAUSE_ILLEGAL_CFG, 2);
+    break;
+}
diff --git a/hwacha/opcodes_hwacha.h b/hwacha/opcodes_hwacha.h
index e384b37..297b3af 100644
--- a/hwacha/opcodes_hwacha.h
+++ b/hwacha/opcodes_hwacha.h
@@ -26,6 +26,7 @@ DECLARE_INSN(vlsegwu, 0xc00205b, 0x1ff0707f)
 DECLARE_INSN(vmsv, 0x200202b, 0xfff0707f)
 DECLARE_INSN(vmvv, 0x200002b, 0xfff0707f)
 DECLARE_INSN(vsetcfg, 0x200b, 0x7fff)
+DECLARE_INSN(vsetprec, 0x805b, 0xfffff)
 DECLARE_INSN(vsetvl, 0x600b, 0xfff0707f)
 DECLARE_INSN(vssegb, 0x207b, 0x1ff0707f)
 DECLARE_INSN(vssegd, 0x600207b, 0x1ff0707f)