From: Ben Widawsky Date: Mon, 8 Jul 2019 19:03:00 +0000 (-0700) Subject: intel_synth: Minor code cleanups X-Git-Tag: working-ls180~1183^2~6 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=060e77c09b51aabe712315d5fd655f62a765d62f;p=yosys.git intel_synth: Minor code cleanups Signed-off-by: Ben Widawsky --- diff --git a/techlibs/intel/synth_intel.cc b/techlibs/intel/synth_intel.cc index 09c9ba3af..69f3b6334 100644 --- a/techlibs/intel/synth_intel.cc +++ b/techlibs/intel/synth_intel.cc @@ -147,8 +147,12 @@ struct SynthIntelPass : public ScriptPass { if (!design->full_selection()) log_cmd_error("This command only operates on fully selected designs!\n"); - if (family_opt != "max10" && family_opt != "a10gx" && family_opt != "cyclonev" && family_opt != "cycloneiv" && - family_opt != "cycloneive" && family_opt != "cyclone10") + if (family_opt != "max10" && + family_opt != "a10gx" && + family_opt != "cyclonev" && + family_opt != "cycloneiv" && + family_opt != "cycloneive" && + family_opt != "cyclone10") log_cmd_error("Invalid or not family specified: '%s'\n", family_opt.c_str()); log_header(design, "Executing SYNTH_INTEL pass.\n");