From: Anton Blanchard Date: Fri, 24 Sep 2021 02:43:33 +0000 (+1000) Subject: Orange Crab is 48MHz not 50MHz, bump PLL frequency X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06266fe84a567b285cb280611756a59bb6b88810;p=microwatt.git Orange Crab is 48MHz not 50MHz, bump PLL frequency I'm not sure why I set the input frequency for the Orange Crab to 50MHz. Since we easily make timing now, bump our output frequency to 48MHz as well. Signed-off-by: Anton Blanchard --- diff --git a/Makefile b/Makefile index 9f308ba..30086a7 100644 --- a/Makefile +++ b/Makefile @@ -157,11 +157,11 @@ ICACHE_NUM_LINES=4 # OrangeCrab with ECP85 ifeq ($(FPGA_TARGET), ORANGE-CRAB) RESET_LOW=true -CLK_INPUT=50000000 -CLK_FREQUENCY=40000000 +CLK_INPUT=48000000 +CLK_FREQUENCY=48000000 LPF=constraints/orange-crab.lpf PACKAGE=CSFBGA285 -NEXTPNR_FLAGS=--um5g-85k --freq 40 +NEXTPNR_FLAGS=--um5g-85k --freq 48 OPENOCD_JTAG_CONFIG=openocd/olimex-arm-usb-tiny-h.cfg OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg endif