From: Richard Earnshaw Date: Thu, 15 Dec 2016 15:54:53 +0000 (+0000) Subject: [arm] Add isa features to FPU descriptions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=066416dabcdc6da2596da2c19a9876218c634435;p=gcc.git [arm] Add isa features to FPU descriptions Similar to the new CPU and architecture ISA feature lists, we now add similar capabilities to each FPU description. We don't use these yet, that will come in later patches. These follow the same style as the newly modified flag sets, but use slightly different defaults that more accurately reflect the ISA specifications. * arm-isa.h (isa_feature): Add bits for VFPv4, FPv5, fp16conv, fP_dbl, fp_d32 and fp_crypto. (ISA_ALL_FPU): Add all the new bits. (ISA_VFPv2, ISA_VFPv3, ISA_VFPv4, ISA_FPv5): New macros. (ISA_FP_ARMv8, ISA_FP_DBL, ISA_FP_D32, ISA_NEON, ISA_CRYPTO): Likewise. * arm-fpus.def: Add ISA features to all FPUs. * arm.h: (arm_fpu_desc): Add new field for ISA bits. * arm.c (all_fpus): Initialize it. * arm-tables.opt: Regenerated. From-SVN: r243709 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 281eff73f86..4bcf816e833 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2016-12-15 Richard Earnshaw + + * arm-isa.h (isa_feature): Add bits for VFPv4, FPv5, fp16conv, + fP_dbl, fp_d32 and fp_crypto. + (ISA_ALL_FPU): Add all the new bits. + (ISA_VFPv2, ISA_VFPv3, ISA_VFPv4, ISA_FPv5): New macros. + (ISA_FP_ARMv8, ISA_FP_DBL, ISA_FP_D32, ISA_NEON, ISA_CRYPTO): Likewise. + * arm-fpus.def: Add ISA features to all FPUs. + * arm.h: (arm_fpu_desc): Add new field for ISA bits. + * arm.c (all_fpus): Initialize it. + * arm-tables.opt: Regenerated. + 2016-12-15 Richard Earnshaw * arm.h (FPU_FL_VFPv2) New feature bit. diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def index 25e2ebdc3d9..1be718fa2cd 100644 --- a/gcc/config/arm/arm-fpus.def +++ b/gcc/config/arm/arm-fpus.def @@ -19,31 +19,31 @@ /* Before using #include to read this file, define a macro: - ARM_FPU(NAME, FEATURES) + ARM_FPU(NAME, ISA, FEATURES) The arguments are the fields of struct arm_fpu_desc. genopt.sh assumes no whitespace up to the first "," in each entry. */ -ARM_FPU("vfp", FPU_VFPv2 | FPU_DBL) -ARM_FPU("vfpv2", FPU_VFPv2 | FPU_DBL) -ARM_FPU("vfpv3", FPU_VFPv3 | FPU_D32) -ARM_FPU("vfpv3-fp16", FPU_VFPv3 | FPU_D32 | FPU_FP16) -ARM_FPU("vfpv3-d16", FPU_VFPv3 | FPU_DBL) -ARM_FPU("vfpv3-d16-fp16", FPU_VFPv3 | FPU_DBL | FPU_FP16) -ARM_FPU("vfpv3xd", FPU_VFPv3) -ARM_FPU("vfpv3xd-fp16", FPU_VFPv3 | FPU_FP16) -ARM_FPU("neon", FPU_VFPv3 | FPU_NEON) -ARM_FPU("neon-vfpv3", FPU_VFPv3 | FPU_NEON) -ARM_FPU("neon-fp16", FPU_VFPv3 | FPU_NEON | FPU_FP16) -ARM_FPU("vfpv4", FPU_VFPv4 | FPU_D32 | FPU_FP16) -ARM_FPU("vfpv4-d16", FPU_VFPv4 | FPU_DBL | FPU_FP16) -ARM_FPU("fpv4-sp-d16", FPU_VFPv4 | FPU_FP16) -ARM_FPU("fpv5-sp-d16", FPU_VFPv5 | FPU_FP16) -ARM_FPU("fpv5-d16", FPU_VFPv5 | FPU_DBL | FPU_FP16) -ARM_FPU("neon-vfpv4", FPU_VFPv4 | FPU_NEON | FPU_FP16) -ARM_FPU("fp-armv8", FPU_ARMv8 | FPU_D32 | FPU_FP16) -ARM_FPU("neon-fp-armv8", FPU_ARMv8 | FPU_NEON | FPU_FP16) -ARM_FPU("crypto-neon-fp-armv8", FPU_ARMv8 | FPU_CRYPTO | FPU_FP16) +ARM_FPU("vfp", ISA_FEAT(ISA_VFPv2) ISA_FEAT(ISA_FP_DBL), FPU_VFPv2 | FPU_DBL) +ARM_FPU("vfpv2", ISA_FEAT(ISA_VFPv2) ISA_FEAT(ISA_FP_DBL), FPU_VFPv2 | FPU_DBL) +ARM_FPU("vfpv3", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_D32), FPU_VFPv3 | FPU_D32) +ARM_FPU("vfpv3-fp16", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_D32) ISA_FEAT(isa_bit_fp16conv), FPU_VFPv3 | FPU_D32 | FPU_FP16) +ARM_FPU("vfpv3-d16", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_DBL), FPU_VFPv3 | FPU_DBL) +ARM_FPU("vfpv3-d16-fp16", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_DBL) ISA_FEAT(isa_bit_fp16conv), FPU_VFPv3 | FPU_DBL | FPU_FP16) +ARM_FPU("vfpv3xd", ISA_FEAT(ISA_VFPv3), FPU_VFPv3) +ARM_FPU("vfpv3xd-fp16", ISA_FEAT(ISA_VFPv3) ISA_FEAT(isa_bit_fp16conv), FPU_VFPv3 | FPU_FP16) +ARM_FPU("neon", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_NEON), FPU_VFPv3 | FPU_NEON) +ARM_FPU("neon-vfpv3", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_NEON), FPU_VFPv3 | FPU_NEON) +ARM_FPU("neon-fp16", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_NEON) ISA_FEAT(isa_bit_fp16conv), FPU_VFPv3 | FPU_NEON | FPU_FP16) +ARM_FPU("vfpv4", ISA_FEAT(ISA_VFPv4) ISA_FEAT(ISA_FP_D32), FPU_VFPv4 | FPU_D32 | FPU_FP16) +ARM_FPU("neon-vfpv4", ISA_FEAT(ISA_VFPv4) ISA_FEAT(ISA_NEON), FPU_VFPv4 | FPU_NEON | FPU_FP16) +ARM_FPU("vfpv4-d16", ISA_FEAT(ISA_VFPv4) ISA_FEAT(ISA_FP_DBL), FPU_VFPv4 | FPU_DBL | FPU_FP16) +ARM_FPU("fpv4-sp-d16", ISA_FEAT(ISA_VFPv4), FPU_VFPv4 | FPU_FP16) +ARM_FPU("fpv5-sp-d16", ISA_FEAT(ISA_FPv5), FPU_VFPv5 | FPU_FP16) +ARM_FPU("fpv5-d16", ISA_FEAT(ISA_FPv5) ISA_FEAT(ISA_FP_DBL), FPU_VFPv5 | FPU_DBL | FPU_FP16) +ARM_FPU("fp-armv8", ISA_FEAT(ISA_FP_ARMv8) ISA_FEAT(ISA_FP_D32), FPU_ARMv8 | FPU_D32 | FPU_FP16) +ARM_FPU("neon-fp-armv8", ISA_FEAT(ISA_FP_ARMv8) ISA_FEAT(ISA_NEON), FPU_ARMv8 | FPU_NEON | FPU_FP16) +ARM_FPU("crypto-neon-fp-armv8", ISA_FEAT(ISA_FP_ARMv8) ISA_FEAT(ISA_CRYPTO), FPU_ARMv8 | FPU_CRYPTO | FPU_FP16) /* Compatibility aliases. */ -ARM_FPU("vfp3", FPU_VFPv3 | FPU_D32) +ARM_FPU("vfp3", ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_D32), FPU_VFPv3 | FPU_D32) diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index 9d833794ca8..faa00aaa6f4 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -504,19 +504,19 @@ EnumValue Enum(arm_fpu) String(vfpv4) Value(11) EnumValue -Enum(arm_fpu) String(vfpv4-d16) Value(12) +Enum(arm_fpu) String(neon-vfpv4) Value(12) EnumValue -Enum(arm_fpu) String(fpv4-sp-d16) Value(13) +Enum(arm_fpu) String(vfpv4-d16) Value(13) EnumValue -Enum(arm_fpu) String(fpv5-sp-d16) Value(14) +Enum(arm_fpu) String(fpv4-sp-d16) Value(14) EnumValue -Enum(arm_fpu) String(fpv5-d16) Value(15) +Enum(arm_fpu) String(fpv5-sp-d16) Value(15) EnumValue -Enum(arm_fpu) String(neon-vfpv4) Value(16) +Enum(arm_fpu) String(fpv5-d16) Value(16) EnumValue Enum(arm_fpu) String(fp-armv8) Value(17) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index e555cf6d08a..bc246c919db 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2323,8 +2323,8 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__"; const struct arm_fpu_desc all_fpus[] = { -#define ARM_FPU(NAME, FEATURES) \ - { NAME, FEATURES }, +#define ARM_FPU(NAME, ISA, FEATURES) \ + { NAME, {ISA isa_nobit}, FEATURES }, #include "arm-fpus.def" #undef ARM_FPU }; diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 332f0fabb04..908e7638333 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -363,6 +363,7 @@ typedef unsigned long arm_fpu_feature_set; extern const struct arm_fpu_desc { const char *name; + enum isa_feature isa_bits[isa_num_bits]; arm_fpu_feature_set features; } all_fpus[];