From: bugzilla-daemon <bugzilla-daemon@libre-soc.org>
Date: Sat, 23 May 2020 20:52:31 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06a7c1cebbab90300a4909ec5a66ba1edfa96551;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero
---

diff --git a/3a/d2cb245c5ce57fb9c5aaba79d7af6b7fe740f5 b/3a/d2cb245c5ce57fb9c5aaba79d7af6b7fe740f5
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+Date: Sat, 23 May 2020 20:52:31 +0000
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+Subject: [libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA
+ (src1) can be zero
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