From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 30 Apr 2021 12:40:09 +0000 (+0000)
Subject: add fake LibreSOCMem library to freepdk_c4m45
X-Git-Tag: LS180_RC3~67
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06baa1c04f06350ffa8d86b42fbe4f66cac05965;p=soclayout.git

add fake LibreSOCMem library to freepdk_c4m45
---

diff --git a/experiments9/freepdk_c4m45/coriolis2/settings.py b/experiments9/freepdk_c4m45/coriolis2/settings.py
index 5988d94..eff8add 100644
--- a/experiments9/freepdk_c4m45/coriolis2/settings.py
+++ b/experiments9/freepdk_c4m45/coriolis2/settings.py
@@ -26,9 +26,13 @@ from   helpers   import overlay, l, u, n
 from   helpers import overlay, l, u, n
 from   NDA.node45.freepdk45_c4m import techno, FlexLib, LibreSOCIO
 
+# "fake" 4k SRAM
+import LibreSOCMem
+
 techno.setup()
 FlexLib.setup()
 LibreSOCIO.setup()
+LibreSOCMem.setup()
 
 
 db = DataBase.getDB()
@@ -47,7 +51,10 @@ def createSramBlackbox ():
                                 'SRAM Cell "{}" not found.' \
                                .format(sramName) )
     sram.setAbstractedSupply( True )
-    blackboxeNames = [ 'spblock_512w64b8w'
+    blackboxeNames = [ 'spblock_512w64b8w_0',
+                       'spblock_512w64b8w_1',
+                       'spblock_512w64b8w_2',
+                       'spblock_512w64b8w_3',
                      ]
     for blackboxName in blackboxeNames:
         cell     = Cell.create( lib, blackboxName )