From: Julia Koval Date: Fri, 30 Mar 2018 07:04:55 +0000 (+0200) Subject: Enable tuning options for skylake-avx512. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06be18e782b9497ffda6523786a38f13f1412e36;p=gcc.git Enable tuning options for skylake-avx512. gcc/ PR target/84413 * x86-tune.def (movx, partial_reg_dependency): Enable for m_SKYLAKE_AVX512. From-SVN: r258972 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3dd318ac97f..132d979c9ea 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-03-30 Julia Koval + + PR target/84413 + * x86-tune.def (movx, partial_reg_dependency): Enable for + m_SKYLAKE_AVX512. + 2018-03-29 Vladimir Makarov PR inline-asm/84985 diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 53d0e1622ac..9843ed806f6 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -50,7 +50,7 @@ DEF_TUNE (X86_TUNE_SCHEDULE, "schedule", DEF_TUNE (X86_TUNE_PARTIAL_REG_DEPENDENCY, "partial_reg_dependency", m_P4_NOCONA | m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_BONNELL | m_SILVERMONT | m_INTEL - | m_KNL | m_KNM | m_AMD_MULTIPLE | m_GENERIC) + | m_KNL | m_KNM | m_AMD_MULTIPLE | m_SKYLAKE_AVX512 | m_GENERIC) /* X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY: This knob promotes all store destinations to be 128bit to allow register renaming on 128bit SSE units, @@ -85,7 +85,7 @@ DEF_TUNE (X86_TUNE_PARTIAL_FLAG_REG_STALL, "partial_flag_reg_stall", DEF_TUNE (X86_TUNE_MOVX, "movx", m_PPRO | m_P4_NOCONA | m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_BONNELL | m_SILVERMONT | m_KNL | m_KNM | m_INTEL - | m_GEODE | m_AMD_MULTIPLE | m_GENERIC) + | m_GEODE | m_AMD_MULTIPLE | m_SKYLAKE_AVX512 | m_GENERIC) /* X86_TUNE_MEMORY_MISMATCH_STALL: Avoid partial stores that are followed by full sized loads. */