From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 9 Jul 2020 19:18:04 +0000 (+0100)
Subject: remove unneeded xer.ca in MulOutputData
X-Git-Tag: div_pipeline~128
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06d78a713eee50336425670b156a0617c684fb1d;p=soc.git

remove unneeded xer.ca in MulOutputData
---

diff --git a/src/soc/fu/mul/pipe_data.py b/src/soc/fu/mul/pipe_data.py
index eef6cd83..3a7abe37 100644
--- a/src/soc/fu/mul/pipe_data.py
+++ b/src/soc/fu/mul/pipe_data.py
@@ -16,8 +16,7 @@ class MulIntermediateData(DIVInputData):
 
 class MulOutputData(IntegerData):
     regspec = [('INT', 'o', '0:128'),
-               ('XER', 'xer_so', '32'), # XER bit 32: SO
-               ('XER', 'xer_ca', '34,45')] # XER bit 34/45: CA/CA32
+               ('XER', 'xer_so', '32')] # XER bit 32: SO
     def __init__(self, pspec):
         super().__init__(pspec, False) # still input style