From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 2 Mar 2019 19:20:25 +0000 (+0000)
Subject: use bool() function instead of reduce(or_)
X-Git-Tag: ls180-24jan2020~1759
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06dfe62eb9776d94513d7fb5905be4cd6afc077f;p=ieee754fpu.git

use bool() function instead of reduce(or_)
---

diff --git a/src/add/fpbase.py b/src/add/fpbase.py
index 0e4cd7a8..d73183f3 100644
--- a/src/add/fpbase.py
+++ b/src/add/fpbase.py
@@ -327,7 +327,8 @@ class FPNumIn(FPNumBase):
         maxsleni = mw - maxslen
         m_mask = sm.rshift(self.m1s[1:], maxsleni) # shift and invert
 
-        stickybits = reduce(or_, inp.m[1:] & m_mask) | inp.m[0]
+        #stickybits = reduce(or_, inp.m[1:] & m_mask) | inp.m[0]
+        stickybits = (inp.m[1:] & m_mask).bool() | inp.m[0]
         return [self.e.eq(inp.e + diff),
                 self.m.eq(Cat(stickybits, rs))
                ]
diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index e9464ce2..af91721d 100644
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -867,7 +867,7 @@ class FPADD:
 
 
 if __name__ == "__main__":
-    alu = FPADD(width=32)
+    alu = FPADD(width=32, single_cycle=True)
     main(alu, ports=alu.in_a.ports() + alu.in_b.ports() + alu.out_z.ports())