From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 20 Jun 2019 13:23:55 +0000 (+0200)
Subject: Improve shregmap help message, fixes #1113
X-Git-Tag: yosys-0.9~61
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06eb87bcb795b44dc0c9e42c0b2a495c05d23881;p=yosys.git

Improve shregmap help message, fixes #1113

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---

diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc
index 21dfe9619..18e60fa6b 100644
--- a/passes/techmap/shregmap.cc
+++ b/passes/techmap/shregmap.cc
@@ -605,9 +605,11 @@ struct ShregmapPass : public Pass {
 		log("\n");
 		log("    -tech greenpak4\n");
 		log("        map to greenpak4 shift registers.\n");
+		log("        this option also implies -clkpol pos -zinit\n");
 		log("\n");
 		log("    -tech xilinx\n");
 		log("        map to xilinx dynamic-length shift registers.\n");
+		log("        this option also implies -params -init\n");
 		log("\n");
 	}
 	void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE