From: Dave Airlie Date: Tue, 14 Feb 2017 06:04:16 +0000 (+1000) Subject: radv: change base aligmment for allocated memory. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=06ffd299252311f57feac4474551bd5b44d3d4d4;p=mesa.git radv: change base aligmment for allocated memory. On some CIK (Hawaii) this needs to be at least 64k, I'm not 100% sure it doesn't need to be 128k. This was causing fast clear eliminate to overwrite the previous buffer, which since my gfx init code, was the indirect buffer. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99692 Tested-by: Kai Wasserbäch Reviewed-by: Edward O'Callaghan Reviewed-by: Bas Nieuwenhuizen Cc: "13.0 17.0" Signed-off-by: Dave Airlie --- diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index c1c22411f94..9bc44b84a2a 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1652,7 +1652,7 @@ VkResult radv_AllocateMemory( if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE) flags |= RADEON_FLAG_GTT_WC; - mem->bo = device->ws->buffer_create(device->ws, alloc_size, 32768, + mem->bo = device->ws->buffer_create(device->ws, alloc_size, 65536, domain, flags); if (!mem->bo) {