From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 1 Jun 2023 11:12:56 +0000 (+0100)
Subject: TODO start on EXTRA322 and smask/smask_extra322 selection
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=070adb7a11f3721302149946f5f13c95a4c23613;p=openpower-isa.git

TODO start on EXTRA322 and smask/smask_extra322 selection
(LDST_IDX-based)
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index 41a0c88e..ed6e98ec 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -1188,20 +1188,28 @@ class ExtendableOperand(DynamicOperand):
             (value, span) = self.sv_spec_enter(value=value, span=span)
 
             for extra_idx in self.extra_idx:
-                if self.record.etype is _SVEType.EXTRA3:
+                etype = self.record.etype
+                if etype is _SVEType.EXTRA3:
                     spec = insn.prefix.rm.extra3[extra_idx]
-                elif self.record.etype is _SVEType.EXTRA2:
+                elif etype is _SVEType.EXTRA2:
                     spec = insn.prefix.rm.extra2[extra_idx]
+                elif etype is _SVEType.EXTRA322 and extra_idx < 3:
+                    if extra_idx in [0, 1]:
+                        spec = insn.prefix.rm.extra3[extra_idx]
+                        etype = _SVEType.EXTRA3
+                    else:
+                        spec = insn.prefix.rm.extra2[extra_idx]
+                        etype = _SVEType.EXTRA2
                 else:
                     raise ValueError(self.record.etype)
 
                 if spec != 0:
                     vector = bool(spec[0])
                     spec_span = spec.__class__
-                    if self.record.etype is _SVEType.EXTRA3:
+                    if etype is _SVEType.EXTRA3:
                         spec_span = tuple(map(str, spec_span[1, 2]))
                         spec = spec[1, 2]
-                    elif self.record.etype is _SVEType.EXTRA2:
+                    elif etype is _SVEType.EXTRA2:
                         spec_span = tuple(map(str, spec_span[1,]))
                         spec = _SelectableInt(value=spec[1].value, bits=2)
                         if vector:
@@ -1298,6 +1306,11 @@ class ExtendableOperand(DynamicOperand):
                     insn.prefix.rm.extra3[extra_idx] = extra
                 elif self.record.etype is _SVEType.EXTRA2:
                     insn.prefix.rm.extra2[extra_idx] = extra
+                elif etype is _SVEType.EXTRA322 and extra_idx < 3:
+                    if extra_idx in [0, 1]:
+                        insn.prefix.rm.extra3[extra_idx] = extra
+                    else:
+                        insn.prefix.rm.extra2[extra_idx] = extra
                 else:
                     raise ValueError(self.record.etype)
 
@@ -1944,9 +1957,11 @@ class BaseRM(_Mapping):
     subvl: _Field = range(8, 10)
     mode: Mode.remap(range(19, 24))
     smask: _Field = range(16, 19)
+    smask_extra322: _Field = (6,7,18,) # LDST_IDX is EXTRA332
     extra: Extra.remap(range(10, 19))
     extra2: Extra2.remap(range(10, 19))
     extra3: Extra3.remap(range(10, 19))
+    # XXX extra332 = (extra3[0], extra3[1], extra2[3])
 
     def specifiers(self, record):
         subvl = int(self.subvl)
@@ -2117,7 +2132,10 @@ class PredicateBaseRM(BaseRM):
         mask = int(self.mask)
         sm = dm = PredicateBaseRM.predicate(CR, mask)
         if record.svp64.ptype is _SVPType.P2:
-            smask = int(self.smask)
+            if False and record.svp64.mode is _SVMode.LDST_IDX:
+                smask = int(self.smask_332)
+            else:
+                smask = int(self.smask)
             sm = PredicateBaseRM.predicate(CR, smask)
         if sm == dm and dm:
             yield ("m=" + dm)
@@ -2626,7 +2644,10 @@ class SpecifierM(SpecifierMask):
         selector.mask = int(self.pred)
         if ((self.record.ptype is _SVPType.P2) and
                 (self.record.svp64.mode is not _SVMode.BRANCH)):
-            selector.smask = int(self.pred)
+            if False and self.record.svp64.mode is _SVMode.LDST_IDX:
+                selector.smask_extra332 = int(self.pred)
+            else:
+                selector.smask = int(self.pred)
         selector.mmode = (self.pred.mode is _SVP64PredMode.CR)
 
 
@@ -2654,7 +2675,10 @@ class SpecifierSM(SpecifierMask):
 
     def assemble(self, insn):
         selector = insn.select(record=self.record)
-        selector.smask = int(self.pred)
+        if False and self.record.svp64.mode is _SVMode.LDST_IDX:
+            selector.smask_extra332 = int(self.pred)
+        else:
+            selector.smask = int(self.pred)
         selector.mmode = (self.pred.mode is _SVP64PredMode.CR)