From: Jean THOMAS <git0@pub.jeanthomas.me>
Date: Mon, 6 Jul 2020 10:51:24 +0000 (+0200)
Subject: Add write transactions in the simulation testbench
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=071e923c100a3f45d78512f9c95ad9c0039ce642;p=gram.git

Add write transactions in the simulation testbench
---

diff --git a/gram/simulation/simsoctb.v b/gram/simulation/simsoctb.v
index a8d3c8d..df7d997 100644
--- a/gram/simulation/simsoctb.v
+++ b/gram/simulation/simsoctb.v
@@ -160,6 +160,11 @@ module simsoctb;
       wishbone_write(32'h00009000 >> 2, 8'h01); // DFII_CONTROL_SEL
       #2000;
 
+      // Write
+      wishbone_write(32'h10000000 >> 2, 32'h12345678);
+      #10000;
+      wishbone_write(32'h10000100 >> 2, 32'h00000000);
+      #10000;
       wishbone_read(32'h10000000 >> 2, tmp);
     end