From: lkcl <lkcl@web>
Date: Wed, 22 Jun 2022 23:08:58 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1586
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=073cf3374fe49f7b05f70470e808c0b105456c9b;p=libreriscv.git

---

diff --git a/openpower/sv/vector_ops.mdwn b/openpower/sv/vector_ops.mdwn
index 109db902c..107184f58 100644
--- a/openpower/sv/vector_ops.mdwn
+++ b/openpower/sv/vector_ops.mdwn
@@ -29,7 +29,7 @@ Notes:
 
 # Mask-suited Bitmanipulation
 
-Based on Cray-style masked set-before-first, set-after-first etc.
+Based on RVV masked set-before-first, set-after-first etc.
 and Intel and AMD Bitmanip instructions made generalised then
 advanced further to include masks, this is a single instruction
 covering 24 individual instructions in other ISAs.