From: Christophe Lyon Date: Sun, 7 Dec 2014 09:40:58 +0000 (+0000) Subject: [ARM,AArch64][testsuite] Fix vaddl and vaddw tests X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=07bdf21b53445f88ec4c5a21fbb5f0e2b0b31e9f;p=gcc.git [ARM,AArch64][testsuite] Fix vaddl and vaddw tests 2014-12-07 Christophe Lyon * gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Actually execute the test. * gcc.target/aarch64/advsimd-intrinsics/vaddl.c: Actually execute the test. Fix expected output. * gcc.target/aarch64/advsimd-intrinsics/vaddw.c: Likewise. From-SVN: r218463 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d96c4ec68a0..4528bc3e41e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2014-12-07 Christophe Lyon + + * gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Actually execute + the test. + * gcc.target/aarch64/advsimd-intrinsics/vaddl.c: Actually execute + the test. Fix expected output. + * gcc.target/aarch64/advsimd-intrinsics/vaddw.c: Likewise. + 2014-12-07 Jan Hubicka * gcc.dg/addr_equal-1.c: New testcase. diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c index 74b4b4d2312..58fd5ea837a 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddhn.c @@ -52,15 +52,13 @@ VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333, VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333, 0x33333333, 0x33333333 }; -#ifndef INSN_NAME #define INSN_NAME vaddhn #define TEST_MSG "VADDHN" -#endif -#define FNNAME1(NAME) void exec_ ## NAME (void) +#define FNNAME1(NAME) exec_ ## NAME #define FNNAME(NAME) FNNAME1(NAME) -FNNAME (INSN_NAME) +void FNNAME (INSN_NAME) (void) { /* Basic test: vec64=vaddhn(vec128_a, vec128_b), then store the result. */ #define TEST_VADDHN1(INSN, T1, T2, W, W2, N) \ @@ -104,6 +102,6 @@ FNNAME (INSN_NAME) int main (void) { - FNNAME (INSN_NAME); + FNNAME (INSN_NAME) (); return 0; } diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c index 861abec8e7b..030785d6ff1 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c @@ -5,13 +5,13 @@ /* Expected results. */ VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33 }; -VECT_VAR_DECL(expected,int,16,4) [] = { 0x33, 0x33, 0x33, 0x33 }; -VECT_VAR_DECL(expected,int,32,2) [] = { 0x33, 0x33 }; +VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 }; +VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 }; VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 }; -VECT_VAR_DECL(expected,uint,8,8) [] = { 0x3, 0x3, 0x3, 0x3, - 0x3, 0x3, 0x3, 0x3 }; -VECT_VAR_DECL(expected,uint,16,4) [] = { 0x37, 0x37, 0x37, 0x37 }; -VECT_VAR_DECL(expected,uint,32,2) [] = { 0x3, 0x3 }; +VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33, + 0x33, 0x33, 0x33, 0x33 }; +VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 }; +VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 }; VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 }; VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33 }; @@ -45,15 +45,13 @@ VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333, VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333, 0x33333333, 0x33333333 }; -#ifndef INSN_NAME #define INSN_NAME vaddl #define TEST_MSG "VADDL" -#endif -#define FNNAME1(NAME) void exec_ ## NAME (void) +#define FNNAME1(NAME) exec_ ## NAME #define FNNAME(NAME) FNNAME1(NAME) -FNNAME (INSN_NAME) +void FNNAME (INSN_NAME) (void) { /* Basic test: y=vaddl(x1,x2), then store the result. */ #define TEST_VADDL1(INSN, T1, T2, W, W2, N) \ @@ -117,6 +115,6 @@ FNNAME (INSN_NAME) int main (void) { - FNNAME (INSN_NAME); + FNNAME (INSN_NAME) (); return 0; } diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c index 5804cd7c444..95cbb310efa 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c @@ -5,13 +5,13 @@ /* Expected results. */ VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33 }; -VECT_VAR_DECL(expected,int,16,4) [] = { 0x33, 0x33, 0x33, 0x33 }; -VECT_VAR_DECL(expected,int,32,2) [] = { 0x33, 0x33 }; +VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 }; +VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 }; VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 }; -VECT_VAR_DECL(expected,uint,8,8) [] = { 0x3, 0x3, 0x3, 0x3, - 0x3, 0x3, 0x3, 0x3 }; -VECT_VAR_DECL(expected,uint,16,4) [] = { 0x37, 0x37, 0x37, 0x37 }; -VECT_VAR_DECL(expected,uint,32,2) [] = { 0x3, 0x3 }; +VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33, + 0x33, 0x33, 0x33, 0x33 }; +VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 }; +VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 }; VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 }; VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33 }; @@ -45,15 +45,13 @@ VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333, VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333, 0x33333333, 0x33333333 }; -#ifndef INSN_NAME #define INSN_NAME vaddw #define TEST_MSG "VADDW" -#endif -#define FNNAME1(NAME) void exec_ ## NAME (void) +#define FNNAME1(NAME) exec_ ## NAME #define FNNAME(NAME) FNNAME1(NAME) -FNNAME (INSN_NAME) +void FNNAME (INSN_NAME) (void) { /* Basic test: y=vaddw(x1,x2), then store the result. */ #define TEST_VADDW1(INSN, T1, T2, W, W2, N) \ @@ -117,6 +115,6 @@ FNNAME (INSN_NAME) int main (void) { - FNNAME (INSN_NAME); + FNNAME (INSN_NAME) (); return 0; }