From: lkcl Date: Sat, 18 Jun 2022 23:08:27 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~1693 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=07fca0789483603b787ebfe7562f758931deea0d;p=libreriscv.git --- diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn index ddde62b44..35d1502cc 100644 --- a/openpower/sv.mdwn +++ b/openpower/sv.mdwn @@ -25,8 +25,6 @@ Fundamental design principles: * Taking the simplicity of the RISC paradigm and applying it strictly and uniformly to create a Scalable Vector ISA. -* Simplicity of introduction and implementation on top of - the existing Power ISA without disruption. * Effectively a hardware for-loop, pausing PC, issuing multiple scalar operations * Preserving the underlying scalar execution dependencies as if the @@ -45,6 +43,8 @@ Fundamental design principles: Advantages of these design principles: +* Simplicity of introduction and implementation on top of + the existing Power ISA without disruption. * It is therefore easy to create a first (and sometimes only) implementation as literally a for-loop in hardware, simulators, and compilers.