From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 2 Jan 2020 23:32:58 +0000 (-0800)
Subject: write_xaiger: get rid of external_bits dict
X-Git-Tag: working-ls180~881^2^2~15
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=07feedfa736637952663dd8174123ea3bf1dddbc;p=yosys.git

write_xaiger: get rid of external_bits dict
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 053f9d835..2b456bb9a 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -78,7 +78,7 @@ struct XAigerWriter
 	Module *module;
 	SigMap sigmap;
 
-	pool<SigBit> input_bits, output_bits, external_bits;
+	pool<SigBit> input_bits, output_bits;
 	dict<SigBit, SigBit> not_map, alias_map;
 	dict<SigBit, pair<SigBit, SigBit>> and_map;
 	vector<SigBit> ci_bits, co_bits;