From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 30 Sep 2019 21:20:47 +0000 (-0700)
Subject: Update area for div_mod
X-Git-Tag: working-ls180~990^2~14
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=08bd1816e39d2abfbe36ce0b58c0d4506db303e4;p=yosys.git

Update area for div_mod
---

diff --git a/tests/xilinx/div_mod.ys b/tests/xilinx/div_mod.ys
index 4518db8bf..da7e60a9a 100644
--- a/tests/xilinx/div_mod.ys
+++ b/tests/xilinx/div_mod.ys
@@ -6,12 +6,12 @@ design -load postopt # load the post-opt design (otherwise equiv_opt loads the p
 cd top # Constrain all select calls below inside the top module
 
 select -assert-count 12 t:LUT1
-select -assert-count 23 t:LUT2
-select -assert-count 12 t:LUT4
-select -assert-count 9  t:LUT5
-select -assert-count 84 t:LUT6
+select -assert-count 19 t:LUT2
+select -assert-count 13 t:LUT4
+select -assert-count 6  t:LUT5
+select -assert-count 82 t:LUT6
 select -assert-count 65 t:MUXCY
-select -assert-count 39 t:MUXF7
-select -assert-count 15 t:MUXF8
+select -assert-count 37 t:MUXF7
+select -assert-count 11 t:MUXF8
 select -assert-count 28 t:XORCY
 select -assert-none t:LUT1 t:LUT2 t:LUT4 t:LUT5 t:LUT6 t:MUXCY t:MUXF7 t:MUXF8 t:XORCY %% t:* %D