From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Wed, 18 Nov 2009 00:02:08 +0000 (-0600)
Subject: ARM: Differentiate between LDM exception return and LDM user regs.
X-Git-Tag: stable_2012_02_02~1575^2~61
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0916c376a97dacf5d11589cfea084f0e7feda4cf;p=gem5.git

ARM: Differentiate between LDM exception return and LDM user regs.
---

diff --git a/src/arch/arm/isa/formats/macromem.isa b/src/arch/arm/isa/formats/macromem.isa
index 068b48199..c834c22cb 100644
--- a/src/arch/arm/isa/formats/macromem.isa
+++ b/src/arch/arm/isa/formats/macromem.isa
@@ -210,7 +210,9 @@ inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
     microOps[0] = new MicroAddiUop(machInst, INTREG_UREG0, RN, 0);
 
     unsigned reg = 0;
-    bool forceUser = machInst.puswl.psruser;
+    bool force_user = machInst.puswl.psruser & !OPCODE_15;
+    bool exception_ret = machInst.puswl.psruser & OPCODE_15;
+
     for (int i = 1; i < ones + 1; i++) {
         // Find the next register.
         while (!bits(regs, reg))
@@ -218,12 +220,12 @@ inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
         replaceBits(regs, reg, 0);
 
         unsigned regIdx = reg;
-        if (forceUser) {
+        if (force_user) {
             regIdx = intRegForceUser(regIdx);
         }
 
         if (machInst.puswl.loadOp) {
-            if (reg == INTREG_PC && forceUser) {
+            if (reg == INTREG_PC && exception_ret) {
                 // This must be the exception return form of ldm.
                 microOps[i] =
                     new MicroLdrRetUop(machInst, regIdx, INTREG_UREG0, addr);