From: Michael Nolan Date: Tue, 28 Jan 2020 16:42:58 +0000 (-0500) Subject: Add fpmin handling to fpmax module X-Git-Tag: ls180-24jan2020~318 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=093800316608e8e60abb16576c8ff373b25e7bd1;p=ieee754fpu.git Add fpmin handling to fpmax module --- diff --git a/src/ieee754/fpmax/fpmax.py b/src/ieee754/fpmax/fpmax.py index 1987d8ee..5c91976d 100644 --- a/src/ieee754/fpmax/fpmax.py +++ b/src/ieee754/fpmax/fpmax.py @@ -48,18 +48,24 @@ class FPMAXPipeMod(PipeModBase): has_nan = Signal() comb += has_nan.eq(a1.is_nan | b1.is_nan) + both_nan = Signal() + comb += both_nan.eq(a1.is_nan & b1.is_nan) with m.If(has_nan): - comb += z1.eq(Mux(a1.is_nan, self.i.b, self.i.a)) + with m.If(both_nan): + comb += z1.eq(a1.fp.nan2(0)) + with m.Else(): + comb += z1.eq(Mux(a1.is_nan, self.i.b, self.i.a)) with m.Else(): with m.If(a1.s != b1.s): - comb += z1.eq(Mux(a1.s, self.i.b, self.i.a)) + comb += z1.eq(Mux(a1.s ^ opcode[0], self.i.b, self.i.a)) with m.Else(): gt = Signal() sign = Signal() comb += sign.eq(a1.s) comb += gt.eq(a1.v > b1.v) - comb += z1.eq(Mux(gt ^ sign, self.i.a, self.i.b)) + comb += z1.eq(Mux(gt ^ sign ^ opcode[0], + self.i.a, self.i.b)) # copy the context (muxid, operator) diff --git a/src/ieee754/fpmax/test/test_fpmax_pipe.py b/src/ieee754/fpmax/test/test_fpmax_pipe.py index 65823f3f..e95d3430 100644 --- a/src/ieee754/fpmax/test/test_fpmax_pipe.py +++ b/src/ieee754/fpmax/test/test_fpmax_pipe.py @@ -7,26 +7,44 @@ from ieee754.fpcommon.test.fpmux import runfp from sfpy import Float16, Float32, Float64 import math + def fpmax_f32_max(a, b): - if math.isnan(a) or math.isnan(b): if math.isnan(a) and math.isnan(b): return Float32(float('nan')) else: return b if math.isnan(a) else a - if a > b: return a else: return b +def fpmax_f32_min(a, b): + if math.isnan(a) or math.isnan(b): + if math.isnan(a) and math.isnan(b): + return Float32(float('nan')) + else: + return b if math.isnan(a) else a + if a < b: + return a + else: + return b + + def test_fpmax_f32_max(): dut = FPMAXMuxInOut(32, 4) runfp(dut, 32, "test_fpmax_f32_max", Float32, fpmax_f32_max, n_vals=100, opcode=0x0) +def test_fpmax_f32_min(): + dut = FPMAXMuxInOut(32, 4) + runfp(dut, 32, "test_fpmax_f32_min", Float32, fpmax_f32_min, + n_vals=100, opcode=0x1) + + if __name__ == '__main__': for i in range(50): + test_fpmax_f32_min() test_fpmax_f32_max()