From: Nick Clifton Date: Tue, 30 Mar 2004 14:04:32 +0000 (+0000) Subject: Add (linker) support for CR16C processor X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0949843db222949909c1cc15724459445105ea1b;p=binutils-gdb.git Add (linker) support for CR16C processor --- diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 3d4a86757f8..c11de69d648 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,45 @@ +2004-03-30 Galit Heller + Tomer Levi + + * Makefile.am (ALL_MACHINES): Add cpu-cr16c.lo. + (ALL_MACHINES_CFILES): Add cpu-cr16c.c. + (BFD32_BACKENDS): Add elf32-cr16c.lo. + (BFD32_BACKENDS_CFILES): Add elf32-cr16c.c. + (cpu-cr16c.lo): New target. + (elf32-cr16c.lo): Likewise. + * Makefile.in: Regenerate. + * archures.c (bfd_architecture): Add bfd_{arch,mach}_cr16c. + (bfd_archures_list): Add bfd_cr16c_arch. + * config.bfd: Handle cr16c-*-elf*. + * configure.in: Handle bfd_elf32_cr16c_vec. + * configure: Regenerate. + * reloc.c: Add BFD_RELOC_16C_NUM08, BFD_RELOC_16C_NUM08_C, + BFD_RELOC_16C_NUM16, BFD_RELOC_16C_NUM16_C, + BFD_RELOC_16C_NUM32, BFD_RELOC_16C_NUM32_C, + BFD_RELOC_16C_DISP04, BFD_RELOC_16C_DISP04_C, + BFD_RELOC_16C_DISP08, BFD_RELOC_16C_DISP08_C, + BFD_RELOC_16C_DISP16, BFD_RELOC_16C_DISP16_C, + BFD_RELOC_16C_DISP24, BFD_RELOC_16C_DISP24_C, + BFD_RELOC_16C_DISP24a, BFD_RELOC_16C_DISP24a_C, + BFD_RELOC_16C_REG04, BFD_RELOC_16C_REG04_C, + BFD_RELOC_16C_REG04a, BFD_RELOC_16C_REG04a_C, + BFD_RELOC_16C_REG14, BFD_RELOC_16C_REG14_C, + BFD_RELOC_16C_REG16, BFD_RELOC_16C_REG16_C, + BFD_RELOC_16C_REG20, BFD_RELOC_16C_REG20_C, + BFD_RELOC_16C_ABS20, BFD_RELOC_16C_ABS20_C, + BFD_RELOC_16C_ABS24, BFD_RELOC_16C_ABS24_C, + BFD_RELOC_16C_IMM04, BFD_RELOC_16C_IMM04_C, + BFD_RELOC_16C_IMM16, BFD_RELOC_16C_IMM16_C, + BFD_RELOC_16C_IMM20, BFD_RELOC_16C_IMM20_C, + BFD_RELOC_16C_IMM24, BFD_RELOC_16C_IMM24_C, + BFD_RELOC_16C_IMM32, BFD_RELOC_16C_IMM32_C. + * targets.c (bfd_elf32_cr16c_vec): Declare. + (bfd_target_vector): Add bfd_elf32_cr16c_vec. + * cpu-cr16c.c: New file. + * elf32-cr16c.c: Likewise. + * libbfd.h: Regenerate. + * bfd-in2.h: Likewise. + 2004-03-30 Jakub Jelinek * elf.c (map_sections_to_segments): Fix handling of .tbss. diff --git a/bfd/Makefile.am b/bfd/Makefile.am index a0516a221da..bc2f64f94da 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -55,6 +55,7 @@ ALL_MACHINES = \ cpu-arc.lo \ cpu-arm.lo \ cpu-avr.lo \ + cpu-cr16c.lo \ cpu-cris.lo \ cpu-d10v.lo \ cpu-d30v.lo \ @@ -111,6 +112,7 @@ ALL_MACHINES_CFILES = \ cpu-arm.c \ cpu-avr.c \ cpu-cris.c \ + cpu-cr16c.c \ cpu-d10v.c \ cpu-d30v.c \ cpu-dlx.c \ @@ -213,6 +215,7 @@ BFD32_BACKENDS = \ elfarm-oabi.lo \ elfarm-nabi.lo \ elf32-avr.lo \ + elf32-cr16c.lo \ elf32-cris.lo \ elf32-d10v.lo \ elf32-d30v.lo \ @@ -378,6 +381,7 @@ BFD32_BACKENDS_CFILES = \ elfarm-oabi.c \ elfarm-nabi.c \ elf32-avr.c \ + elf32-cr16c.c \ elf32-cris.c \ elf32-d10v.c \ elf32-d30v.c \ @@ -915,6 +919,7 @@ cpu-alpha.lo: cpu-alpha.c $(INCDIR)/filenames.h cpu-arc.lo: cpu-arc.c $(INCDIR)/filenames.h cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h +cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h @@ -1137,6 +1142,10 @@ elf32-avr.lo: elf32-avr.c $(INCDIR)/filenames.h elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \ elf32-target.h +elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(INCDIR)/elf/cr16c.h $(INCDIR)/elf/reloc-macros.h \ + elf32-target.h elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index 51dc85a6745..aa60ce9fbbc 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -1,4 +1,4 @@ -# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am +# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am # Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation @@ -183,6 +183,7 @@ ALL_MACHINES = \ cpu-arc.lo \ cpu-arm.lo \ cpu-avr.lo \ + cpu-cr16c.lo \ cpu-cris.lo \ cpu-d10v.lo \ cpu-d30v.lo \ @@ -240,6 +241,7 @@ ALL_MACHINES_CFILES = \ cpu-arm.c \ cpu-avr.c \ cpu-cris.c \ + cpu-cr16c.c \ cpu-d10v.c \ cpu-d30v.c \ cpu-dlx.c \ @@ -343,6 +345,7 @@ BFD32_BACKENDS = \ elfarm-oabi.lo \ elfarm-nabi.lo \ elf32-avr.lo \ + elf32-cr16c.lo \ elf32-cris.lo \ elf32-d10v.lo \ elf32-d30v.lo \ @@ -509,6 +512,7 @@ BFD32_BACKENDS_CFILES = \ elfarm-oabi.c \ elfarm-nabi.c \ elf32-avr.c \ + elf32-cr16c.c \ elf32-cris.c \ elf32-d10v.c \ elf32-d30v.c \ @@ -814,7 +818,7 @@ configure.in version.h DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best SOURCES = $(libbfd_a_SOURCES) $(libbfd_la_SOURCES) OBJECTS = $(libbfd_a_OBJECTS) $(libbfd_la_OBJECTS) @@ -1452,6 +1456,7 @@ cpu-alpha.lo: cpu-alpha.c $(INCDIR)/filenames.h cpu-arc.lo: cpu-arc.c $(INCDIR)/filenames.h cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h +cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h @@ -1674,6 +1679,10 @@ elf32-avr.lo: elf32-avr.c $(INCDIR)/filenames.h elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \ elf32-target.h +elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(INCDIR)/elf/cr16c.h $(INCDIR)/elf/reloc-macros.h \ + elf32-target.h elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ $(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \ diff --git a/bfd/archures.c b/bfd/archures.c index 0e2a08b831f..f75be843866 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -307,6 +307,8 @@ DESCRIPTION .#define bfd_mach_avr3 3 .#define bfd_mach_avr4 4 .#define bfd_mach_avr5 5 +. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *} +.#define bfd_mach_cr16c 1 . bfd_arch_cris, {* Axis CRIS *} . bfd_arch_s390, {* IBM s390 *} .#define bfd_mach_s390_31 31 @@ -375,6 +377,7 @@ extern const bfd_arch_info_type bfd_alpha_arch; extern const bfd_arch_info_type bfd_arc_arch; extern const bfd_arch_info_type bfd_arm_arch; extern const bfd_arch_info_type bfd_avr_arch; +extern const bfd_arch_info_type bfd_cr16c_arch; extern const bfd_arch_info_type bfd_cris_arch; extern const bfd_arch_info_type bfd_d10v_arch; extern const bfd_arch_info_type bfd_d30v_arch; @@ -435,6 +438,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_arc_arch, &bfd_arm_arch, &bfd_avr_arch, + &bfd_cr16c_arch, &bfd_cris_arch, &bfd_d10v_arch, &bfd_d30v_arch, diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index f774264bda9..e6048c33a94 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1705,6 +1705,8 @@ enum bfd_architecture #define bfd_mach_avr3 3 #define bfd_mach_avr4 4 #define bfd_mach_avr5 5 + bfd_arch_cr16c, /* National Semiconductor CompactRISC. */ +#define bfd_mach_cr16c 1 bfd_arch_cris, /* Axis CRIS */ bfd_arch_s390, /* IBM s390 */ #define bfd_mach_s390_31 31 @@ -3343,6 +3345,48 @@ to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */ This is the 5 bits of a value. */ BFD_RELOC_M68HC12_5B, +/* NS CR16C Relocations. */ + BFD_RELOC_16C_NUM08, + BFD_RELOC_16C_NUM08_C, + BFD_RELOC_16C_NUM16, + BFD_RELOC_16C_NUM16_C, + BFD_RELOC_16C_NUM32, + BFD_RELOC_16C_NUM32_C, + BFD_RELOC_16C_DISP04, + BFD_RELOC_16C_DISP04_C, + BFD_RELOC_16C_DISP08, + BFD_RELOC_16C_DISP08_C, + BFD_RELOC_16C_DISP16, + BFD_RELOC_16C_DISP16_C, + BFD_RELOC_16C_DISP24, + BFD_RELOC_16C_DISP24_C, + BFD_RELOC_16C_DISP24a, + BFD_RELOC_16C_DISP24a_C, + BFD_RELOC_16C_REG04, + BFD_RELOC_16C_REG04_C, + BFD_RELOC_16C_REG04a, + BFD_RELOC_16C_REG04a_C, + BFD_RELOC_16C_REG14, + BFD_RELOC_16C_REG14_C, + BFD_RELOC_16C_REG16, + BFD_RELOC_16C_REG16_C, + BFD_RELOC_16C_REG20, + BFD_RELOC_16C_REG20_C, + BFD_RELOC_16C_ABS20, + BFD_RELOC_16C_ABS20_C, + BFD_RELOC_16C_ABS24, + BFD_RELOC_16C_ABS24_C, + BFD_RELOC_16C_IMM04, + BFD_RELOC_16C_IMM04_C, + BFD_RELOC_16C_IMM16, + BFD_RELOC_16C_IMM16_C, + BFD_RELOC_16C_IMM20, + BFD_RELOC_16C_IMM20_C, + BFD_RELOC_16C_IMM24, + BFD_RELOC_16C_IMM24_C, + BFD_RELOC_16C_IMM32, + BFD_RELOC_16C_IMM32_C, + /* These relocs are only used within the CRIS assembler. They are not (at present) written to any object files. */ BFD_RELOC_CRIS_BDISP8, diff --git a/bfd/config.bfd b/bfd/config.bfd index bb5ab621dbb..ec326cc271a 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -306,6 +306,11 @@ case "${targ}" in targ_underscore=yes ;; + cr16c-*-elf*) + targ_defvec=bfd_elf32_cr16c_vec + targ_underscore=yes + ;; + cris-*-*) targ_defvec=cris_aout_vec targ_selvecs="bfd_elf32_us_cris_vec bfd_elf32_cris_vec ieee_vec" diff --git a/bfd/configure b/bfd/configure index ab9049b058d..cec4a8b929c 100755 --- a/bfd/configure +++ b/bfd/configure @@ -6299,6 +6299,7 @@ do bfd_elf32_bigarm_oabi_vec) tb="$tb elfarm-oabi.lo elf32.lo $elf" ;; bfd_elf32_bigarm_vec) tb="$tb elfarm-nabi.lo elf32.lo $elf" ;; bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;; + bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;; bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;; bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;; bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;; @@ -6586,10 +6587,10 @@ case ${host64}-${target64}-${want64} in if test -n "$GCC" ; then bad_64bit_gcc=no; echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6 -echo "configure:6590: checking for gcc version with buggy 64-bit support" >&5 +echo "configure:6591: checking for gcc version with buggy 64-bit support" >&5 # Add more tests for gcc versions with non-working 64-bit support here. cat > conftest.$ac_ext <&6 -echo "configure:6635: checking for $ac_func" >&5 +echo "configure:6636: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6664: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -6685,13 +6686,13 @@ done if test x"$ac_cv_func_ftello" = xyes -a x"$ac_cv_func_fseeko" = xyes; then echo $ac_n "checking size of off_t""... $ac_c" 1>&6 -echo "configure:6689: checking size of off_t" >&5 +echo "configure:6690: checking size of off_t" >&5 if eval "test \"`echo '$''{'ac_cv_sizeof_off_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else for ac_size in 4 8 1 2 16 12 ; do # List sizes in rough order of prevalence. cat > conftest.$ac_ext < @@ -6701,7 +6702,7 @@ int main() { switch (0) case 0: case (sizeof (off_t) == $ac_size):; ; return 0; } EOF -if { (eval echo configure:6705: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:6706: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_sizeof_off_t=$ac_size else @@ -6725,7 +6726,7 @@ EOF fi echo $ac_n "checking file_ptr type""... $ac_c" 1>&6 -echo "configure:6729: checking file_ptr type" >&5 +echo "configure:6730: checking file_ptr type" >&5 bfd_file_ptr="long" bfd_ufile_ptr="unsigned long" if test x"$ac_cv_func_ftello64" = xyes -a x"$ac_cv_func_fseeko64" = xyes \ @@ -6750,17 +6751,17 @@ for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:6754: checking for $ac_hdr" >&5 +echo "configure:6755: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:6764: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:6765: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -6789,12 +6790,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:6793: checking for $ac_func" >&5 +echo "configure:6794: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6822: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -6842,7 +6843,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:6846: checking for working mmap" >&5 +echo "configure:6847: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -6850,7 +6851,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:7008: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -7028,12 +7029,12 @@ fi for ac_func in madvise mprotect do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:7032: checking for $ac_func" >&5 +echo "configure:7033: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:7061: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else diff --git a/bfd/configure.in b/bfd/configure.in index e08a663dcdb..d0aeca76210 100644 --- a/bfd/configure.in +++ b/bfd/configure.in @@ -608,6 +608,7 @@ do bfd_elf32_bigarm_oabi_vec) tb="$tb elfarm-oabi.lo elf32.lo $elf" ;; bfd_elf32_bigarm_vec) tb="$tb elfarm-nabi.lo elf32.lo $elf" ;; bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;; + bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;; bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;; bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;; bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;; diff --git a/bfd/cpu-cr16c.c b/bfd/cpu-cr16c.c new file mode 100644 index 00000000000..0773e08774f --- /dev/null +++ b/bfd/cpu-cr16c.c @@ -0,0 +1,38 @@ +/* BFD support for the CR16C processor. + Copyright 2004 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" + +const bfd_arch_info_type bfd_cr16c_arch = + { + 16, /* 16 bits in a word. */ + 32, /* 32 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_cr16c, + bfd_mach_cr16c, + "cr16c", + "cr16c", + 1, + TRUE, /* The one and only. */ + bfd_default_compatible, + bfd_default_scan , + 0, + }; diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in index 85d64277e3c..136b42992a9 100644 --- a/bfd/doc/Makefile.in +++ b/bfd/doc/Makefile.in @@ -1,4 +1,4 @@ -# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am +# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am # Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation @@ -257,7 +257,7 @@ DIST_COMMON = ChangeLog Makefile.am Makefile.in DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best all: all-redirect .SUFFIXES: diff --git a/bfd/elf32-cr16c.c b/bfd/elf32-cr16c.c new file mode 100644 index 00000000000..3e2e275d603 --- /dev/null +++ b/bfd/elf32-cr16c.c @@ -0,0 +1,1015 @@ +/* BFD back-end for National Semiconductor's CR16C ELF + Copyright 2004 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" +#include "bfdlink.h" +#include "elf/cr16c.h" +#include "elf-bfd.h" + + +#define USE_REL 1 /* CR16C uses REL relocations instead of RELA. */ + +/* The following definition is based on EMPTY_HOWTO macro, + but also initiates the "name" field in HOWTO struct. */ +#define ONLY_NAME_HOWTO(C) \ + HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \ + STRINGX(C), FALSE, 0, 0, FALSE) + +/* reloc_map_index array maps CRASM relocation type into a BFD + relocation enum. The array's indices are synchronized with + RINDEX_16C_* indices, created in include/elf/cr16c.h. + The array is used in: + 1. elf32-cr16c.c : elf_cr16c_reloc_type_lookup(). + 2. asreloc.c : find_reloc_type(). */ + +RELOC_MAP reloc_map_index[RINDEX_16C_MAX] = +{ + {R_16C_NUM08, BFD_RELOC_16C_NUM08}, + {R_16C_NUM08_C, BFD_RELOC_16C_NUM08_C}, + {R_16C_NUM16, BFD_RELOC_16C_NUM16}, + {R_16C_NUM16_C, BFD_RELOC_16C_NUM16_C}, + {R_16C_NUM32, BFD_RELOC_16C_NUM32}, + {R_16C_NUM32_C, BFD_RELOC_16C_NUM32_C}, + {R_16C_DISP04, BFD_RELOC_16C_DISP04}, + {R_16C_DISP04_C, BFD_RELOC_16C_DISP04_C}, + {R_16C_DISP08, BFD_RELOC_16C_DISP08}, + {R_16C_DISP08_C, BFD_RELOC_16C_DISP08_C}, + {R_16C_DISP16, BFD_RELOC_16C_DISP16}, + {R_16C_DISP16_C, BFD_RELOC_16C_DISP16_C}, + {R_16C_DISP24, BFD_RELOC_16C_DISP24}, + {R_16C_DISP24_C, BFD_RELOC_16C_DISP24_C}, + {R_16C_DISP24a, BFD_RELOC_16C_DISP24a}, + {R_16C_DISP24a_C, BFD_RELOC_16C_DISP24a_C}, + {R_16C_REG04, BFD_RELOC_16C_REG04}, + {R_16C_REG04_C, BFD_RELOC_16C_REG04_C}, + {R_16C_REG04a, BFD_RELOC_16C_REG04a}, + {R_16C_REG04a_C, BFD_RELOC_16C_REG04a_C}, + {R_16C_REG14, BFD_RELOC_16C_REG14}, + {R_16C_REG14_C, BFD_RELOC_16C_REG14_C}, + {R_16C_REG16, BFD_RELOC_16C_REG16}, + {R_16C_REG16_C, BFD_RELOC_16C_REG16_C}, + {R_16C_REG20, BFD_RELOC_16C_REG20}, + {R_16C_REG20_C, BFD_RELOC_16C_REG20_C}, + {R_16C_ABS20, BFD_RELOC_16C_ABS20}, + {R_16C_ABS20_C, BFD_RELOC_16C_ABS20_C}, + {R_16C_ABS24, BFD_RELOC_16C_ABS24}, + {R_16C_ABS24_C, BFD_RELOC_16C_ABS24_C}, + {R_16C_IMM04, BFD_RELOC_16C_IMM04}, + {R_16C_IMM04_C, BFD_RELOC_16C_IMM04_C}, + {R_16C_IMM16, BFD_RELOC_16C_IMM16}, + {R_16C_IMM16_C, BFD_RELOC_16C_IMM16_C}, + {R_16C_IMM20, BFD_RELOC_16C_IMM20}, + {R_16C_IMM20_C, BFD_RELOC_16C_IMM20_C}, + {R_16C_IMM24, BFD_RELOC_16C_IMM24}, + {R_16C_IMM24_C, BFD_RELOC_16C_IMM24_C}, + {R_16C_IMM32, BFD_RELOC_16C_IMM32}, + {R_16C_IMM32_C, BFD_RELOC_16C_IMM32_C} +}; + +static reloc_howto_type elf_howto_table[] = +{ + /* 00 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM08), + /* 01 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM08_C), + /* 02 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM16), + /* 03 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM16_C), + /* 04 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM32), + /* 05 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM32_C), + /* 06 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP04), + /* 07 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP04_C), + /* 08 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP08), + /* 09 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP08_C), + /* 10 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP16), + /* 11 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP16_C), + /* 12 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24), + /* 13 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24_C), + /* 14 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24a), + /* 15 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24a_C), + /* 16 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04), + /* 17 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04_C), + /* 18 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04a), + /* 19 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04a_C), + /* 20 */ ONLY_NAME_HOWTO (RINDEX_16C_REG14), + /* 21 */ ONLY_NAME_HOWTO (RINDEX_16C_REG14_C), + /* 22 */ ONLY_NAME_HOWTO (RINDEX_16C_REG16), + /* 23 */ ONLY_NAME_HOWTO (RINDEX_16C_REG16_C), + /* 24 */ ONLY_NAME_HOWTO (RINDEX_16C_REG20), + /* 25 */ ONLY_NAME_HOWTO (RINDEX_16C_REG20_C), + /* 26 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS20), + /* 27 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS20_C), + /* 28 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS24), + /* 29 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS24_C), + /* 30 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM04), + /* 31 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM04_C), + /* 32 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM16), + /* 33 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM16_C), + /* 34 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM20), + /* 35 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM20_C), + /* 36 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM24), + /* 37 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM24_C), + /* 38 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM32), + /* 39 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM32_C) +}; + + +/* Code to turn a code_type into a howto ptr, uses the above howto table. */ + +static reloc_howto_type * +elf_cr16c_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ + unsigned int i; + + for (i = 0; i < RINDEX_16C_MAX; i++) + { + if (code == reloc_map_index[i].bfd_reloc_enum) + { + /* printf ("CR16C Relocation Type is - %x\n", code); */ + return & elf_howto_table[i]; + } + } + + /* printf ("This relocation Type is not supported - %x\n", code); */ + return 0; +} + +static void +elf_cr16c_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, + arelent *cache_ptr ATTRIBUTE_UNUSED, + Elf_Internal_Rela *dst ATTRIBUTE_UNUSED) +{ + abort (); +} + +static void +elf_cr16c_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, + arelent *cache_ptr, + Elf_Internal_Rela *dst) +{ + unsigned int r_type = ELF32_R_TYPE (dst->r_info); + + BFD_ASSERT (r_type < (unsigned int) RINDEX_16C_MAX); + cache_ptr->howto = &elf_howto_table[r_type]; +} + +/* Perform a relocation as part of a final link. */ + +static bfd_reloc_status_type +cr16c_elf_final_link_relocate (reloc_howto_type *howto, + bfd *abfd, + bfd *output_bfd ATTRIBUTE_UNUSED, + asection *input_section, + bfd_byte *data, + bfd_vma octets, + bfd_vma Rvalue, + bfd_vma addend ATTRIBUTE_UNUSED, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + asection *sym_sec ATTRIBUTE_UNUSED, + int is_local ATTRIBUTE_UNUSED) +{ + long value; + short sword; /* Extracted from the hole and put back. */ + unsigned long format, addr_type, code_factor; + unsigned short size; + unsigned short r_type; + asymbol *symbol = NULL; + + unsigned long disp20_opcod; + char neg = 0; + char neg2pos = 0; + + long left_val = 0; + long plus_factor = 0; /* To be added to the hole. */ + +#define MIN_BYTE ((int) 0xFFFFFF80) +#define MIN_WORD ((int) 0xFFFF8000) +#define MAX_UWORD ((unsigned) 0x0000FFFF) +#define MAX_UBYTE ((unsigned) 0x000000FF) + + r_type = reloc_map_index[howto->type].cr_reloc_type; + format = r_type & R_FORMAT; + size = r_type & R_SIZESP; + addr_type = r_type & R_ADDRTYPE; + code_factor = ((addr_type == R_CODE_ADDR) ? 1 : 0); + + if (sym_sec) + symbol = sym_sec->symbol; + + switch (format) + { + case R_NUMBER: + switch (size) + { + case R_S_16C_08: /* One byte. */ + value = bfd_get_8 (abfd, (char *) data + octets); + break; + case R_S_16C_16: /* Two bytes. */ + sword = bfd_get_16 (abfd, (bfd_byte *) data + octets); + value = sword; + break; + case R_S_16C_32: /* Four bytes. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_DISPL: + switch (size) + { + case R_S_16C_04: /* word1(4-7). */ + value = bfd_get_8 (abfd, (char *) data + octets); + left_val = value & 0xF; + value = (value & 0xF0) >> 4; + value++; + value <<= 1; + break; + case R_S_16C_08: /* word1(0-3,8-11). */ + sword = bfd_get_16 (abfd, (char *) data + octets); + value = sword & 0x000F; + value |= ((sword & 0x0F00) >> 4); + left_val = sword & 0xF0F0; + value <<= 1; + if (value & 0x100) + value |= 0xFFFFFF00; + break; + case R_S_16C_16: /* word2. */ + sword = bfd_get_16 (abfd, (bfd_byte *) data + octets); + value = sword; + value = ((value & 0xFFFE) >> 1) | ((value & 0x1) << 15); + value <<= 1; + if (value & 0x10000) + value |= 0xFFFF0000; + break; + case R_S_16C_24_a: /* word1(0-7),word2. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + left_val = value & 0x0000FF00; + value = ((value & 0xFFFE0000) >> 17) | + ((value & 0x00010000) << 7) | ((value & 0x000000FF) << 15); + value <<= 1; + if (value & 0x1000000) + value |= 0xFE000000; + break; + case R_S_16C_24: /* word2(0-3,8-11),word3. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + left_val = value & 0x0000F0F0; + value = ((value >> 16) & 0x0000FFFF) | + ((value & 0x00000F00) << 8) | ((value & 0x0000000F) << 20); + + value = ((value & 0x00FFFFFE) >> 1) | ((value & 0x00000001) << 23); + + value <<= 1; + if (value & 0x1000000) + value |= 0xFE000000; + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_REGREL: + switch (size) + { + case R_S_16C_04: /* word1(12-15) not scaled. */ + value = bfd_get_8 (abfd, (char *) data + octets); + left_val = value & 0xF0; + value = value & 0xF; + break; + case R_S_16C_04_a: /* word1(12-15) scaled by 2. */ + value = bfd_get_8 (abfd, (char *) data + octets); + left_val = value & 0xF0; + value = value & 0xF; + value <<= 1; + break; + case R_S_16C_14: /* word1(4-5),word2(0-3,8-15). */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + left_val = value & 0x00F0FFCF; + value = ((value & 0xc0000000) >> 24) | + ((value & 0x3F000000) >> 16) | + ((value & 0x000F0000) >> 16) | (value & 0x00000030); + break; + case R_S_16C_16: /* word2. */ + sword = bfd_get_16 (abfd, (bfd_byte *) data + octets); + value = sword; + break; + case R_S_16C_20: /* word2(8-11),word3. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + left_val = value & 0xF0; + value = (value & 0xF) << 16; + sword = bfd_get_16 (abfd, (bfd_byte *) data + octets + 1); + value = value | (unsigned short) sword; + disp20_opcod = bfd_get_32 (abfd, (bfd_byte *) data + octets - 3); + disp20_opcod |= 0x0FFF0000; + if ((disp20_opcod == 0x4FFF0018) || /* loadb -disp20(reg) */ + (disp20_opcod == 0x5FFF0018) || /* loadb -disp20(rp) */ + (disp20_opcod == 0x8FFF0018) || /* loadd -disp20(reg) */ + (disp20_opcod == 0x9FFF0018) || /* loadd -disp20(rp) */ + (disp20_opcod == 0xCFFF0018) || /* loadw -disp20(reg) */ + (disp20_opcod == 0xDFFF0018) || /* loadw -disp20(rp) */ + (disp20_opcod == 0x4FFF0019) || /* storb -disp20(reg) */ + (disp20_opcod == 0x5FFF0019) || /* storb -disp20(rp) */ + (disp20_opcod == 0x8FFF0019) || /* stord -disp20(reg) */ + (disp20_opcod == 0x9FFF0019) || /* stord -disp20(rp) */ + (disp20_opcod == 0xCFFF0019) || /* storw -disp20(reg) */ + (disp20_opcod == 0xDFFF0019)) + { /* storw -disp20(rp). */ + neg = 1; + value |= 0xFFF00000; + } + + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_ABS: + switch (size) + { + case R_S_16C_20: /* word1(0-3),word2. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + left_val = value & 0x0000FFF0; + value = ((value & 0xFFFF0000) >> 16) | + ((value & 0x0000000F) << 16); + break; + case R_S_16C_24: /* word2(0-3,8-11),word3. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + left_val = value & 0x0000F0F0; + value = ((value & 0xFFFF0000) >> 16) | + ((value & 0x00000F00) << 8) | ((value & 0x0000000F) << 20); + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_IMMED: + switch (size) + { + case R_S_16C_04: /* word1/2(4-7). */ + value = bfd_get_8 (abfd, (char *) data + octets); + left_val = value & 0xF; + value = (value & 0xF0) >> 4; + break; + case R_S_16C_16: /* word2. */ + sword = bfd_get_16 (abfd, (bfd_byte *) data + octets); + value = sword; + break; + case R_S_16C_20: /* word1(0-3),word2. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + left_val = value & 0x0000FFF0; + value = ((value & 0xFFFF0000) >> 16) | + ((value & 0x0000000F) << 16); + break; + case R_S_16C_32: /* word2, word3. */ + value = bfd_get_32 (abfd, (bfd_byte *) data + octets); + value = ((value & 0x0000FFFF) << 16) | + ((value & 0xFFFF0000) >> 16); + break; + default: + return bfd_reloc_notsupported; + } + break; + default: + return bfd_reloc_notsupported; + } + + switch ((r_type & R_RELTO) >> 4) + { + + case 0: /* R_ABS. */ + plus_factor = Rvalue; + break; + case 1: /* R_PCREL. */ + plus_factor = Rvalue - + (input_section->output_section->vma + input_section->output_offset); + break; + default: + return bfd_reloc_notsupported; + } + + if (neg) + { + if (plus_factor >= -value) + neg2pos = 1; + /* We need to change load/stor with negative + displ opcode to positive disp opcode (CR16C). */ + } + + value = value + (plus_factor >> code_factor); + + switch (format) + { + case R_NUMBER: + switch (size) + { + case R_S_16C_08: /* One byte. */ + if (value > (int) MAX_UBYTE || value < MIN_BYTE) + return bfd_reloc_overflow; + value &= 0xFF; + bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_16: /* Two bytes. */ + if (value > (int) MAX_UWORD || value < MIN_WORD) + return bfd_reloc_overflow; + value &= 0xFFFF; + sword = value; + bfd_put_16 (abfd, (bfd_vma) sword, + (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_32: /* Four bytes. */ + value &= 0xFFFFFFFF; + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_DISPL: + switch (size) + { + case R_S_16C_04: /* word1(4-7). */ + if ((value - 32) > 32 || value < 2) + return bfd_reloc_overflow; + value >>= 1; + value--; + value &= 0xF; + value <<= 4; + value |= left_val; + bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_08: /* word1(0-3,8-11). */ + if (value > 255 || value < -256 || value == 0x80) + return bfd_reloc_overflow; + value &= 0x1FF; + value >>= 1; + sword = value & 0x000F; + sword |= (value & 0x00F0) << 4; + sword |= left_val; + bfd_put_16 (abfd, (bfd_vma) sword, + (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_16: /* word2. */ + if (value > 65535 || value < -65536) + return bfd_reloc_overflow; + value >>= 1; + value &= 0xFFFF; + value = ((value & 0x8000) >> 15) | ((value & 0x7FFF) << 1); + sword = value; + bfd_put_16 (abfd, (bfd_vma) sword, + (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_24_a: /* word1(0-7),word2. */ + if (value > 16777215 || value < -16777216) + return bfd_reloc_overflow; + value &= 0x1FFFFFF; + value >>= 1; + value = ((value & 0x00007FFF) << 17) | + ((value & 0x00800000) >> 7) | ((value & 0x007F8000) >> 15); + value |= left_val; + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_24: /* word2(0-3,8-11),word3. */ + if (value > 16777215 || value < -16777216) + return bfd_reloc_overflow; + value &= 0x1FFFFFF; + value >>= 1; + + value = ((value & 0x007FFFFF) << 1) | ((value & 0x00800000) >> 23); + + value = ((value & 0x0000FFFF) << 16) | + ((value & 0x000F0000) >> 8) | ((value & 0x00F00000) >> 20); + value |= left_val; + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_REGREL: + switch (size) + { + case R_S_16C_04: /* word1(12-15) not scaled. */ + if (value > 13 || value < 0) + return bfd_reloc_overflow; + value &= 0xF; + value |= left_val; + bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_04_a: /* word1(12-15) not scaled. */ + if (value > 26 || value < 0) + return bfd_reloc_overflow; + value &= 0x1F; + value >>= 1; + value |= left_val; + bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_14: /* word1(4-5),word2(0-3,8-15). */ + if (value < 0 || value > 16383) + return bfd_reloc_overflow; + value &= 0x3FFF; + value = ((value & 0x000000c0) << 24) | + ((value & 0x00003F00) << 16) | + ((value & 0x0000000F) << 16) | (value & 0x00000030); + value |= left_val; + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_16: /* word2. */ + if (value > 65535 || value < 0) + return bfd_reloc_overflow; + value &= 0xFFFF; + sword = value; + bfd_put_16 (abfd, (bfd_vma) sword, + (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_20: /* word2(8-11),word3. */ + /* if (value > 1048575 || value < 0) RELOC_ERROR(1); */ + value &= 0xFFFFF; + sword = value & 0x0000FFFF; + value = (value & 0x000F0000) >> 16; + value |= left_val; + bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets); + bfd_put_16 (abfd, (bfd_vma) sword, + (unsigned char *) data + octets + 1); + if (neg2pos) + { + /* Change load/stor negative displ opcode + to load/stor positive displ opcode. */ + value = bfd_get_8 (abfd, (char *) data + octets - 3); + value &= 0xF7; + value |= 0x2; + bfd_put_8 (abfd, (bfd_vma) value, + (unsigned char *) data + octets - 3); + } + return bfd_reloc_ok; + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_ABS: + switch (size) + { + case R_S_16C_20: /* word1(0-3),word2. */ + if (value > 1048575 || value < 0) + return bfd_reloc_overflow; + value &= 0xFFFFF; + value = ((value & 0x0000FFFF) << 16) | + ((value & 0x000F0000) >> 16); + value |= left_val; + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_24: /* word2(0-3,8-11),word3. */ + /* if (value > 16777215 || value < 0) RELOC_ERROR(1); */ + value &= 0xFFFFFF; + value = ((value & 0x0000FFFF) << 16) | + ((value & 0x000F0000) >> 8) | ((value & 0x00F00000) >> 20); + value |= left_val; + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + default: + return bfd_reloc_notsupported; + } + break; + + case R_16C_IMMED: + switch (size) + { + case R_S_16C_04: /* word1/2(4-7). */ + if (value > 15 || value < -1) + return bfd_reloc_overflow; + value &= 0xF; + value <<= 4; + value |= left_val; + bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_16: /* word2. */ + if (value > 32767 || value < -32768) + return bfd_reloc_overflow; + value &= 0xFFFF; + sword = value; + bfd_put_16 (abfd, (bfd_vma) sword, + (unsigned char *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_20: /* word1(0-3),word2. */ + if (value > 1048575 || value < 0) + return bfd_reloc_overflow; + value &= 0xFFFFF; + value = ((value & 0x0000FFFF) << 16) | + ((value & 0x000F0000) >> 16); + value |= left_val; + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + case R_S_16C_32: /* word2, word3. */ + value &= 0xFFFFFFFF; + value = ((value & 0x0000FFFF) << 16) | + ((value & 0xFFFF0000) >> 16); + bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets); + return bfd_reloc_ok; + break; + default: + return bfd_reloc_notsupported; + } + break; + default: + return bfd_reloc_notsupported; + } +} + +/* Relocate a CR16C ELF section. */ + +static bfd_boolean +elf32_cr16c_relocate_section (bfd *output_bfd, + struct bfd_link_info *info, + bfd *input_bfd, + asection *input_section, + bfd_byte *contents, + Elf_Internal_Rela *relocs, + Elf_Internal_Sym *local_syms, + asection **local_sections) +{ + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + Elf_Internal_Rela *rel, *relend; + + symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (input_bfd); + + rel = relocs; + relend = relocs + input_section->reloc_count; + for (; rel < relend; rel++) + { + int r_type; + reloc_howto_type *howto; + unsigned long r_symndx; + Elf_Internal_Sym *sym; + asection *sec; + struct elf_link_hash_entry *h; + bfd_vma relocation; + bfd_reloc_status_type r; + + r_symndx = ELF32_R_SYM (rel->r_info); + r_type = ELF32_R_TYPE (rel->r_info); + howto = elf_howto_table + r_type; + + if (info->relocatable) + { + /* This is a relocatable link. We don't have to change + anything, unless the reloc is against a section symbol, + in which case we have to adjust according to where the + section symbol winds up in the output section. */ + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) + { + sec = local_sections[r_symndx]; + rel->r_addend += sec->output_offset + sym->st_value; + } + } + + continue; + } + + /* This is a final link. */ + h = NULL; + sym = NULL; + sec = NULL; + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + sec = local_sections[r_symndx]; + relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); + } + else + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + if (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak) + { + sec = h->root.u.def.section; + relocation = (h->root.u.def.value + + sec->output_section->vma + sec->output_offset); + } + else if (h->root.type == bfd_link_hash_undefweak) + relocation = 0; + else + { + if (!((*info->callbacks->undefined_symbol) + (info, h->root.root.string, input_bfd, + input_section, rel->r_offset, TRUE))) + return FALSE; + relocation = 0; + } + } + + r = cr16c_elf_final_link_relocate (howto, input_bfd, output_bfd, + input_section, + contents, rel->r_offset, + relocation, rel->r_addend, + info, sec, h == NULL); + + if (r != bfd_reloc_ok) + { + const char *name; + const char *msg = (const char *) 0; + + if (h != NULL) + name = h->root.root.string; + else + { + name = (bfd_elf_string_from_elf_section + (input_bfd, symtab_hdr->sh_link, sym->st_name)); + if (name == NULL || *name == '\0') + name = bfd_section_name (input_bfd, sec); + } + + switch (r) + { + case bfd_reloc_overflow: + if (!((*info->callbacks->reloc_overflow) + (info, name, howto->name, (bfd_vma) 0, + input_bfd, input_section, rel->r_offset))) + return FALSE; + break; + + case bfd_reloc_undefined: + if (!((*info->callbacks->undefined_symbol) + (info, name, input_bfd, input_section, + rel->r_offset, TRUE))) + return FALSE; + break; + + case bfd_reloc_outofrange: + msg = _("internal error: out of range error"); + goto common_error; + + case bfd_reloc_notsupported: + msg = _("internal error: unsupported relocation error"); + goto common_error; + + case bfd_reloc_dangerous: + msg = _("internal error: dangerous error"); + goto common_error; + + default: + msg = _("internal error: unknown error"); + /* fall through */ + + common_error: + if (!((*info->callbacks->warning) + (info, msg, name, input_bfd, input_section, + rel->r_offset))) + return FALSE; + break; + } + } + } + + return TRUE; +} + +static asection * +elf32_cr16c_gc_mark_hook (asection *sec, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + Elf_Internal_Rela *rel, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + if (h != NULL) + { + switch (ELF32_R_TYPE (rel->r_info)) + { + + default: + switch (h->root.type) + { + case bfd_link_hash_defined: + case bfd_link_hash_defweak: + return h->root.u.def.section; + + case bfd_link_hash_common: + return h->root.u.c.p->section; + + default: + break; + } + } + } + else + { + return bfd_section_from_elf_index (sec->owner, sym->st_shndx); + } + + return NULL; +} + +/* Update the got entry reference counts for the section being removed. */ + +static bfd_boolean +elf32_cr16c_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + asection *sec ATTRIBUTE_UNUSED, + const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED) +{ + /* We don't support garbage collection of GOT and PLT relocs yet. */ + return TRUE; +} + +/* CR16C ELF uses three common sections: + One is for default common symbols (placed in usual common section). + Second is for near common symbols (placed in "ncommon" section). + Third is for far common symbols (placed in "fcommon" section). + The following implementation is based on elf32-mips architecture */ + +static asection cr16c_elf_fcom_section; +static asymbol cr16c_elf_fcom_symbol; +static asymbol * cr16c_elf_fcom_symbol_ptr; +static asection cr16c_elf_ncom_section; +static asymbol cr16c_elf_ncom_symbol; +static asymbol * cr16c_elf_ncom_symbol_ptr; + +/* Given a BFD section, try to locate the + corresponding ELF section index. */ + +static bfd_boolean +elf32_cr16c_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED, + asection *sec, + int *retval) +{ + if (strcmp (bfd_get_section_name (abfd, sec), ".fcommon") == 0) + *retval = SHN_CR16C_FCOMMON; + else if (strcmp (bfd_get_section_name (abfd, sec), ".ncommon") == 0) + *retval = SHN_CR16C_NCOMMON; + else + return FALSE; + + return TRUE; +} + +/* Handle the special CR16C section numbers that a symbol may use. */ + +static void +elf32_cr16c_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED, + asymbol *asym) +{ + elf_symbol_type *elfsym = (elf_symbol_type *) asym; + unsigned int indx; + + indx = elfsym->internal_elf_sym.st_shndx; + + switch (indx) + { + case SHN_CR16C_FCOMMON: + if (cr16c_elf_fcom_section.name == NULL) + { + /* Initialize the far common section. */ + cr16c_elf_fcom_section.name = ".fcommon"; + cr16c_elf_fcom_section.flags = SEC_IS_COMMON | SEC_ALLOC; + cr16c_elf_fcom_section.output_section = &cr16c_elf_fcom_section; + cr16c_elf_fcom_section.symbol = &cr16c_elf_fcom_symbol; + cr16c_elf_fcom_section.symbol_ptr_ptr = &cr16c_elf_fcom_symbol_ptr; + cr16c_elf_fcom_symbol.name = ".fcommon"; + cr16c_elf_fcom_symbol.flags = BSF_SECTION_SYM; + cr16c_elf_fcom_symbol.section = &cr16c_elf_fcom_section; + cr16c_elf_fcom_symbol_ptr = &cr16c_elf_fcom_symbol; + } + asym->section = &cr16c_elf_fcom_section; + asym->value = elfsym->internal_elf_sym.st_size; + break; + case SHN_CR16C_NCOMMON: + if (cr16c_elf_ncom_section.name == NULL) + { + /* Initialize the far common section. */ + cr16c_elf_ncom_section.name = ".ncommon"; + cr16c_elf_ncom_section.flags = SEC_IS_COMMON | SEC_ALLOC; + cr16c_elf_ncom_section.output_section = &cr16c_elf_ncom_section; + cr16c_elf_ncom_section.symbol = &cr16c_elf_ncom_symbol; + cr16c_elf_ncom_section.symbol_ptr_ptr = &cr16c_elf_ncom_symbol_ptr; + cr16c_elf_ncom_symbol.name = ".ncommon"; + cr16c_elf_ncom_symbol.flags = BSF_SECTION_SYM; + cr16c_elf_ncom_symbol.section = &cr16c_elf_ncom_section; + cr16c_elf_ncom_symbol_ptr = &cr16c_elf_ncom_symbol; + } + asym->section = &cr16c_elf_ncom_section; + asym->value = elfsym->internal_elf_sym.st_size; + break; + } +} + +/* Hook called by the linker routine which adds symbols from an object + file. We must handle the special cr16c section numbers here. */ + +static bfd_boolean +elf32_cr16c_add_symbol_hook (bfd *abfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + const Elf_Internal_Sym *sym, + const char **namep ATTRIBUTE_UNUSED, + flagword *flagsp ATTRIBUTE_UNUSED, + asection **secp, + bfd_vma *valp) +{ + unsigned int indx = sym->st_shndx; + + switch (indx) + { + case SHN_CR16C_FCOMMON: + *secp = bfd_make_section_old_way (abfd, ".fcommon"); + (*secp)->flags |= SEC_IS_COMMON; + *valp = sym->st_size; + break; + case SHN_CR16C_NCOMMON: + *secp = bfd_make_section_old_way (abfd, ".ncommon"); + (*secp)->flags |= SEC_IS_COMMON; + *valp = sym->st_size; + break; + } + + return TRUE; +} + +static bfd_boolean +elf32_cr16c_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED, + const char *name ATTRIBUTE_UNUSED, + Elf_Internal_Sym *sym, + asection *input_sec, + struct elf_link_hash_entry *h ATTRIBUTE_UNUSED) +{ + /* If we see a common symbol, which implies a relocatable link, then + if a symbol was in a special common section in an input file, mark + it as a special common in the output file. */ + + if (sym->st_shndx == SHN_COMMON) + { + if (strcmp (input_sec->name, ".fcommon") == 0) + sym->st_shndx = SHN_CR16C_FCOMMON; + else if (strcmp (input_sec->name, ".ncommon") == 0) + sym->st_shndx = SHN_CR16C_NCOMMON; + } + + return TRUE; +} + +/* Definitions for setting CR16C target vector. */ +#define TARGET_LITTLE_SYM bfd_elf32_cr16c_vec +#define TARGET_LITTLE_NAME "elf32-cr16c" +#define ELF_ARCH bfd_arch_cr16c +#define ELF_MACHINE_CODE EM_CR +#define ELF_MAXPAGESIZE 0x1 +#define elf_symbol_leading_char '_' + +#define bfd_elf32_bfd_reloc_type_lookup elf_cr16c_reloc_type_lookup +#define elf_info_to_howto elf_cr16c_info_to_howto +#define elf_info_to_howto_rel elf_cr16c_info_to_howto_rel +#define elf_backend_relocate_section elf32_cr16c_relocate_section +#define elf_backend_gc_mark_hook elf32_cr16c_gc_mark_hook +#define elf_backend_gc_sweep_hook elf32_cr16c_gc_sweep_hook +#define elf_backend_symbol_processing elf32_cr16c_symbol_processing +#define elf_backend_section_from_bfd_section elf32_cr16c_section_from_bfd_section +#define elf_backend_add_symbol_hook elf32_cr16c_add_symbol_hook +#define elf_backend_link_output_symbol_hook elf32_cr16c_link_output_symbol_hook + +#define elf_backend_can_gc_sections 1 + +#include "elf32-target.h" diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 62043f3860a..e4e17f98035 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -1437,6 +1437,46 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_M68HC11_PAGE", "BFD_RELOC_M68HC11_24", "BFD_RELOC_M68HC12_5B", + "BFD_RELOC_16C_NUM08", + "BFD_RELOC_16C_NUM08_C", + "BFD_RELOC_16C_NUM16", + "BFD_RELOC_16C_NUM16_C", + "BFD_RELOC_16C_NUM32", + "BFD_RELOC_16C_NUM32_C", + "BFD_RELOC_16C_DISP04", + "BFD_RELOC_16C_DISP04_C", + "BFD_RELOC_16C_DISP08", + "BFD_RELOC_16C_DISP08_C", + "BFD_RELOC_16C_DISP16", + "BFD_RELOC_16C_DISP16_C", + "BFD_RELOC_16C_DISP24", + "BFD_RELOC_16C_DISP24_C", + "BFD_RELOC_16C_DISP24a", + "BFD_RELOC_16C_DISP24a_C", + "BFD_RELOC_16C_REG04", + "BFD_RELOC_16C_REG04_C", + "BFD_RELOC_16C_REG04a", + "BFD_RELOC_16C_REG04a_C", + "BFD_RELOC_16C_REG14", + "BFD_RELOC_16C_REG14_C", + "BFD_RELOC_16C_REG16", + "BFD_RELOC_16C_REG16_C", + "BFD_RELOC_16C_REG20", + "BFD_RELOC_16C_REG20_C", + "BFD_RELOC_16C_ABS20", + "BFD_RELOC_16C_ABS20_C", + "BFD_RELOC_16C_ABS24", + "BFD_RELOC_16C_ABS24_C", + "BFD_RELOC_16C_IMM04", + "BFD_RELOC_16C_IMM04_C", + "BFD_RELOC_16C_IMM16", + "BFD_RELOC_16C_IMM16_C", + "BFD_RELOC_16C_IMM20", + "BFD_RELOC_16C_IMM20_C", + "BFD_RELOC_16C_IMM24", + "BFD_RELOC_16C_IMM24_C", + "BFD_RELOC_16C_IMM32", + "BFD_RELOC_16C_IMM32_C", "BFD_RELOC_CRIS_BDISP8", "BFD_RELOC_CRIS_UNSIGNED_5", "BFD_RELOC_CRIS_SIGNED_6", diff --git a/bfd/reloc.c b/bfd/reloc.c index 9bffaa36588..cc4f6a7c28f 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -3770,6 +3770,89 @@ ENUMDOC Motorola 68HC12 reloc. This is the 5 bits of a value. +ENUM + BFD_RELOC_16C_NUM08 +ENUMX + BFD_RELOC_16C_NUM08_C +ENUMX + BFD_RELOC_16C_NUM16 +ENUMX + BFD_RELOC_16C_NUM16_C +ENUMX + BFD_RELOC_16C_NUM32 +ENUMX + BFD_RELOC_16C_NUM32_C +ENUMX + BFD_RELOC_16C_DISP04 +ENUMX + BFD_RELOC_16C_DISP04_C +ENUMX + BFD_RELOC_16C_DISP08 +ENUMX + BFD_RELOC_16C_DISP08_C +ENUMX + BFD_RELOC_16C_DISP16 +ENUMX + BFD_RELOC_16C_DISP16_C +ENUMX + BFD_RELOC_16C_DISP24 +ENUMX + BFD_RELOC_16C_DISP24_C +ENUMX + BFD_RELOC_16C_DISP24a +ENUMX + BFD_RELOC_16C_DISP24a_C +ENUMX + BFD_RELOC_16C_REG04 +ENUMX + BFD_RELOC_16C_REG04_C +ENUMX + BFD_RELOC_16C_REG04a +ENUMX + BFD_RELOC_16C_REG04a_C +ENUMX + BFD_RELOC_16C_REG14 +ENUMX + BFD_RELOC_16C_REG14_C +ENUMX + BFD_RELOC_16C_REG16 +ENUMX + BFD_RELOC_16C_REG16_C +ENUMX + BFD_RELOC_16C_REG20 +ENUMX + BFD_RELOC_16C_REG20_C +ENUMX + BFD_RELOC_16C_ABS20 +ENUMX + BFD_RELOC_16C_ABS20_C +ENUMX + BFD_RELOC_16C_ABS24 +ENUMX + BFD_RELOC_16C_ABS24_C +ENUMX + BFD_RELOC_16C_IMM04 +ENUMX + BFD_RELOC_16C_IMM04_C +ENUMX + BFD_RELOC_16C_IMM16 +ENUMX + BFD_RELOC_16C_IMM16_C +ENUMX + BFD_RELOC_16C_IMM20 +ENUMX + BFD_RELOC_16C_IMM20_C +ENUMX + BFD_RELOC_16C_IMM24 +ENUMX + BFD_RELOC_16C_IMM24_C +ENUMX + BFD_RELOC_16C_IMM32 +ENUMX + BFD_RELOC_16C_IMM32_C +ENUMDOC + NS CR16C Relocations. + ENUM BFD_RELOC_CRIS_BDISP8 ENUMX diff --git a/bfd/targets.c b/bfd/targets.c index 9d81c56431c..256a2af642a 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -517,6 +517,7 @@ extern const bfd_target bfd_elf32_bigarc_vec; extern const bfd_target bfd_elf32_bigarm_oabi_vec; extern const bfd_target bfd_elf32_bigarm_vec; extern const bfd_target bfd_elf32_bigmips_vec; +extern const bfd_target bfd_elf32_cr16c_vec; extern const bfd_target bfd_elf32_cris_vec; extern const bfd_target bfd_elf32_d10v_vec; extern const bfd_target bfd_elf32_d30v_vec; @@ -807,6 +808,7 @@ static const bfd_target * const _bfd_target_vector[] = { &bfd_elf32_bigarm_oabi_vec, &bfd_elf32_bigarm_vec, &bfd_elf32_bigmips_vec, + &bfd_elf32_cr16c_vec, &bfd_elf32_cris_vec, &bfd_elf32_d10v_vec, &bfd_elf32_d30v_vec, diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 385b857e384..28ec205b586 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,9 @@ +2004-30-30 Galit Heller + Tomer Levi + + * common.h (EM_CR): Define. + * cr16c.h: New file. + 2004-03-23 Paul Brook * arm.h (EF_ERM_BE8, EF_ARM_LE8, EF_ARM_EABI_VER3): Add. diff --git a/include/elf/common.h b/include/elf/common.h index bf233f61dfd..8ebc2cf4724 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -180,6 +180,7 @@ #define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ #define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ #define EM_IP2K 101 /* Ubicom IP2022 micro controller */ +#define EM_CR 103 /* National Semiconductor CompactRISC */ #define EM_MSP430 105 /* TI msp430 micro controller */ /* If it is necessary to assign new unofficial EM_* values, please pick large diff --git a/include/elf/cr16c.h b/include/elf/cr16c.h new file mode 100644 index 00000000000..1a91afe0fea --- /dev/null +++ b/include/elf/cr16c.h @@ -0,0 +1,258 @@ +/* CR16C ELF support for BFD. + Copyright 2004 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _ELF_CR16C_H +#define _ELF_CR16C_H + +#include "bfd.h" +#include "elf/reloc-macros.h" + +/* Creating indices for reloc_map_index array. */ +START_RELOC_NUMBERS (elf_cr16c_reloc_type) + RELOC_NUMBER (RINDEX_16C_NUM08, 0) + RELOC_NUMBER (RINDEX_16C_NUM08_C, 1) + RELOC_NUMBER (RINDEX_16C_NUM16, 2) + RELOC_NUMBER (RINDEX_16C_NUM16_C, 3) + RELOC_NUMBER (RINDEX_16C_NUM32, 4) + RELOC_NUMBER (RINDEX_16C_NUM32_C, 5) + RELOC_NUMBER (RINDEX_16C_DISP04, 6) + RELOC_NUMBER (RINDEX_16C_DISP04_C, 7) + RELOC_NUMBER (RINDEX_16C_DISP08, 8) + RELOC_NUMBER (RINDEX_16C_DISP08_C, 9) + RELOC_NUMBER (RINDEX_16C_DISP16, 10) + RELOC_NUMBER (RINDEX_16C_DISP16_C, 11) + RELOC_NUMBER (RINDEX_16C_DISP24, 12) + RELOC_NUMBER (RINDEX_16C_DISP24_C, 13) + RELOC_NUMBER (RINDEX_16C_DISP24a, 14) + RELOC_NUMBER (RINDEX_16C_DISP24a_C, 15) + RELOC_NUMBER (RINDEX_16C_REG04, 16) + RELOC_NUMBER (RINDEX_16C_REG04_C, 17) + RELOC_NUMBER (RINDEX_16C_REG04a, 18) + RELOC_NUMBER (RINDEX_16C_REG04a_C, 19) + RELOC_NUMBER (RINDEX_16C_REG14, 20) + RELOC_NUMBER (RINDEX_16C_REG14_C, 21) + RELOC_NUMBER (RINDEX_16C_REG16, 22) + RELOC_NUMBER (RINDEX_16C_REG16_C, 23) + RELOC_NUMBER (RINDEX_16C_REG20, 24) + RELOC_NUMBER (RINDEX_16C_REG20_C, 25) + RELOC_NUMBER (RINDEX_16C_ABS20, 26) + RELOC_NUMBER (RINDEX_16C_ABS20_C, 27) + RELOC_NUMBER (RINDEX_16C_ABS24, 28) + RELOC_NUMBER (RINDEX_16C_ABS24_C, 29) + RELOC_NUMBER (RINDEX_16C_IMM04, 30) + RELOC_NUMBER (RINDEX_16C_IMM04_C, 31) + RELOC_NUMBER (RINDEX_16C_IMM16, 32) + RELOC_NUMBER (RINDEX_16C_IMM16_C, 33) + RELOC_NUMBER (RINDEX_16C_IMM20, 34) + RELOC_NUMBER (RINDEX_16C_IMM20_C, 35) + RELOC_NUMBER (RINDEX_16C_IMM24, 36) + RELOC_NUMBER (RINDEX_16C_IMM24_C, 37) + RELOC_NUMBER (RINDEX_16C_IMM32, 38) + RELOC_NUMBER (RINDEX_16C_IMM32_C, 39) +END_RELOC_NUMBERS (RINDEX_16C_MAX) + +/* CR16C Relocation Types ('cr_reloc_type' entry in the reloc_map structure). + The relocation constant name is determined as follows : + + R_16C_[_C] + + Where : + + is one of the following: + NUM - R_NUMBER mnemonic, + DISP - R_16C_DISPL mnemonic, + REG - R_16C_REGREL mnemonic, + ABS - R_16C_ABS mnemonic, + IMM - R_16C_IMMED mnemonic, + stands for R_S_16C_ + _C means 'code label' and is only added when R_ADDRTYPE subfield + is of type R_CODE_ADDR. */ + +/* The table below shows what the hex digits in the definition of the + relocation type constants correspond to. + ------------------------------------------------------------------ + R_SIZESP R_FORMAT R_RELTO R_ADDRTYPE + ------------------------------------------------------------------ */ +/* R_S_16C_08 R_NUMBER R_ABS R_ADDRESS */ +#define R_16C_NUM08 0X0001 + +/* R_S_16C_08 R_NUMBER R_ABS R_CODE_ADDR */ +#define R_16C_NUM08_C 0X0006 + +/* R_S_16C_16 R_NUMBER R_ABS R_ADDRESS */ +#define R_16C_NUM16 0X1001 + +/* R_S_16C_16 R_NUMBER R_ABS R_CODE_ADDR */ +#define R_16C_NUM16_C 0X1006 + +/* R_S_16C_32 R_NUMBER R_ABS R_ADDRESS */ +#define R_16C_NUM32 0X2001 + +/* R_S_16C_32 R_NUMBER R_ABS R_CODE_ADDR */ +#define R_16C_NUM32_C 0X2006 + +/* R_S_16C_04 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP04 0X5411 + +/* R_S_16C_04 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP04_C 0X5416 + +/* R_S_16C_08 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP08 0X0411 + +/* R_S_16C_08 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP08_C 0X0416 + +/* R_S_16C_16 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP16 0X1411 + +/* R_S_16C_16 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP16_C 0X1416 + +/* R_S_16C_24 R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP24 0X7411 + +/* R_S_16C_24 R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP24_C 0X7416 + +/* R_S_16C_24a R_16C_DISPL R_PCREL R_ADDRESS */ +#define R_16C_DISP24a 0X6411 + +/* R_S_16C_24a R_16C_DISPL R_PCREL R_CODE_ADDR */ +#define R_16C_DISP24a_C 0X6416 + +/* R_S_16C_04 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG04 0X5201 + +/* R_S_16C_04 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG04_C 0X5206 + +/* R_S_16C_04_a R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG04a 0X4201 + +/* R_S_16C_04_a R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG04a_C 0X4206 + +/* R_S_16C_14 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG14 0X3201 + +/* R_S_16C_14 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG14_C 0X3206 + +/* R_S_16C_16 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG16 0X1201 + +/* R_S_16C_16 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG16_C 0X1206 + +/* R_S_16C_20 R_16C_REGREL R_ABS R_ADDRESS */ +#define R_16C_REG20 0X8201 + +/* R_S_16C_20 R_16C_REGREL R_ABS R_CODE_ADDR */ +#define R_16C_REG20_C 0X8206 + +/* R_S_16C_20 R_16C_ABS R_ABS R_ADDRESS */ +#define R_16C_ABS20 0X8101 + +/* R_S_16C_20 R_16C_ABS R_ABS R_CODE_ADDR */ +#define R_16C_ABS20_C 0X8106 + +/* R_S_16C_24 R_16C_ABS R_ABS R_ADDRESS */ +#define R_16C_ABS24 0X7101 + +/* R_S_16C_24 R_16C_ABS R_ABS R_CODE_ADDR */ +#define R_16C_ABS24_C 0X7106 + +/* R_S_16C_04 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM04 0X5301 + +/* R_S_16C_04 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM04_C 0X5306 + +/* R_S_16C_16 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM16 0X1301 + +/* R_S_16C_16 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM16_C 0X1306 + +/* R_S_16C_20 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM20 0X8301 + +/* R_S_16C_20 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM20_C 0X8306 + +/* R_S_16C_24 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM24 0X7301 + +/* R_S_16C_24 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM24_C 0X7306 + +/* R_S_16C_32 R_16C_IMMED R_ABS R_ADDRESS */ +#define R_16C_IMM32 0X2301 + +/* R_S_16C_32 R_16C_IMMED R_ABS R_CODE_ADDR */ +#define R_16C_IMM32_C 0X2306 + + +/* Relocation item type. */ +#define R_ADDRTYPE 0x000f +#define R_ADDRESS 0x0001 /* Take address of symbol. */ +#define R_CODE_ADDR 0x0006 /* Take address of symbol divided by 2. */ + +/* Relocation action. */ +#define R_RELTO 0x00f0 +#define R_ABS 0x0000 /* Keep symbol's address as such. */ +#define R_PCREL 0x0010 /* Subtract the pc address of hole. */ + +/* Relocation item data format. */ +#define R_FORMAT 0x0f00 +#define R_NUMBER 0x0000 /* Retain as two's complement value. */ +#define R_16C_DISPL 0x0400 /* CR16C displacement type. */ +#define R_16C_ABS 0x0100 /* CR16C absolute type. */ +#define R_16C_REGREL 0x0200 /* CR16C register-relative type. */ +#define R_16C_IMMED 0x0300 /* CR16C immediate type. */ + +/* Relocation item size. */ +#define R_SIZESP 0xf000 +#define R_S_16C_04 0x5000 +#define R_S_16C_04_a 0x4000 +#define R_S_16C_08 0x0000 +#define R_S_16C_14 0x3000 +#define R_S_16C_16 0x1000 +#define R_S_16C_20 0x8000 +#define R_S_16C_24_a 0x6000 +#define R_S_16C_24 0x7000 +#define R_S_16C_32 0x2000 + + +/* Processor specific section indices. These sections do not actually + exist. Symbols with a st_shndx field corresponding to one of these + values have a special meaning. */ + +/* Far common symbol. */ +#define SHN_CR16C_FCOMMON 0xff00 +#define SHN_CR16C_NCOMMON 0xff01 + +typedef struct reloc_map +{ + unsigned short cr_reloc_type; /* CR relocation type. */ + bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */ +} RELOC_MAP; + +#endif /* _ELF_CR16C_H */ diff --git a/ld/ChangeLog b/ld/ChangeLog index d46845d147e..8943f114f8e 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,13 @@ +2004-03-30 Galit Heller + + * Makefile.am (ALL_EMULATIONS): Add eelf32cr16c.o. + (eelf32cr16c.c): New target. + * Makefile.in: Regenerate. + * configure.tgt: Handle cr16c-*-elf*. + * emulparams/elf32cr16c.sh: New file. + * scripttempl/elfcr16c.sc: Likewise + * NEWS: Mention support for new target. + 2004-03-30 Nick Clifton * po/sv.po: Updated Swedish translation. diff --git a/ld/Makefile.am b/ld/Makefile.am index 25b1cfb4419..656ded246c6 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -149,6 +149,7 @@ ALL_EMULATIONS = \ eelf32_i860.o \ eelf32_sparc.o \ eelf32b4300.o \ + eelf32cr16c.o \ eelf32bmip.o \ eelf32bmipn32.o \ eelf32btsmip.o \ @@ -629,6 +630,10 @@ eelf32b4300.c: $(srcdir)/emulparams/elf32b4300.sh \ $(srcdir)/emulparams/elf32bmip.sh $(srcdir)/emultempl/mipself.em \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32b4300 "$(tdir_elf32b4300)" +eelf32cr16c.c: $(srcdir)/emulparams/elf32cr16c.sh \ + $(srcdir)/emultempl/elf32.em \ + $(srcdir)/scripttempl/elf32cr16c.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32cr16c "$(tdir_elf32cr16c)" eelf32bmip.c: $(srcdir)/emulparams/elf32bmip.sh \ $(srcdir)/emultempl/mipself.em \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} diff --git a/ld/Makefile.in b/ld/Makefile.in index 5a91690336a..0075163fa1b 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -263,6 +263,7 @@ ALL_EMULATIONS = \ eelf32_i860.o \ eelf32_sparc.o \ eelf32b4300.o \ + eelf32cr16c.o \ eelf32bmip.o \ eelf32bmipn32.o \ eelf32btsmip.o \ @@ -1355,6 +1356,10 @@ eelf32b4300.c: $(srcdir)/emulparams/elf32b4300.sh \ $(srcdir)/emulparams/elf32bmip.sh $(srcdir)/emultempl/mipself.em \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32b4300 "$(tdir_elf32b4300)" +eelf32cr16c.c: $(srcdir)/emulparams/elf32cr16c.sh \ + $(srcdir)/emultempl/elf32.em \ + $(srcdir)/scripttempl/elf32cr16c.sc ${GEN_DEPENDS} + ${GENSCRIPTS} elf32cr16c "$(tdir_elf32cr16c)" eelf32bmip.c: $(srcdir)/emulparams/elf32bmip.sh \ $(srcdir)/emultempl/mipself.em \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} diff --git a/ld/NEWS b/ld/NEWS index 0db0d1808b7..89ff13fb3f5 100644 --- a/ld/NEWS +++ b/ld/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* cr16c support added by NSC. + * m32r Linux (ELF) support added by Renesas. * Improved linker's handling of unresolved symbols. The switch diff --git a/ld/configure.tgt b/ld/configure.tgt index 2c85431adb6..2c3bc489387 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -26,6 +26,7 @@ arm-*-pe) targ_emul=armpe ; arc-*-elf*) targ_emul=arcelf ;; avr-*-*) targ_emul=avr2 targ_extra_emuls="avr1 avr3 avr4 avr5" ;; +cr16c-*-elf*) targ_emul=elf32cr16c ;; cris-*-*aout*) targ_emul=crisaout targ_extra_emuls="criself crislinux" targ_extra_libpath=$targ_extra_emuls ;; diff --git a/ld/emulparams/elf32cr16c.sh b/ld/emulparams/elf32cr16c.sh new file mode 100644 index 00000000000..e78e5edc7fa --- /dev/null +++ b/ld/emulparams/elf32cr16c.sh @@ -0,0 +1,5 @@ +SCRIPT_NAME=elf32cr16c +TEMPLATE_NAME=elf32 +OUTPUT_FORMAT="elf32-cr16c" +ARCH=cr16c +ENTRY=_start diff --git a/ld/scripttempl/elf32cr16c.sc b/ld/scripttempl/elf32cr16c.sc new file mode 100644 index 00000000000..b02edfdcde1 --- /dev/null +++ b/ld/scripttempl/elf32cr16c.sc @@ -0,0 +1,52 @@ +# Linker Script for National Semiconductor's CR16C-ELF32. + +test -z "$ENTRY" && ENTRY=_start +cat < rom + .rdata : { __RDATA_START = .; *(.rdata_4) *(.rdata_2) *(.rdata_1) __RDATA_END = .; } > near_rom + .ctor ALIGN(4) : { __CTOR_LIST = .; *(.ctors) __CTOR_END = .; } > near_rom + .dtor ALIGN(4) : { __DTOR_LIST = .; *(.dtors) __DTOR_END = .; } > near_rom + .data : { __DATA_START = .; *(.data_4) *(.data_2) *(.data_1) *(.data) __DATA_END = .; } > ram AT > rom + .bss (NOLOAD) : { __BSS_START = .; *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) __BSS_END = .; } > ram + .nrdata : { __NRDATA_START = .; *(.nrdat_4) *(.nrdat_2) *(.nrdat_1) __NRDATA_END = .; } > near_rom + .ndata : { __NDATA_START = .; *(.ndata_4) *(.ndata_2) *(.ndata_1) __NDATA_END = .; } > near_ram AT > rom + .nbss (NOLOAD) : { __NBSS_START = .; *(.nbss_4) *(.nbss_2) *(.nbss_1) *(.ncommon) __NBSS_END = .; } > near_ram + .heap : { . = ALIGN(4); __HEAP_START = .; . += 0x2000; __HEAP_MAX = .; } > near_ram + .stack : { . = ALIGN(4); . += 0x6000; __STACK_START = .; } > ram + .istack : { . = ALIGN(2); . += 0x100; __ISTACK_START = .; } > ram +} + +__DATA_IMAGE_START = LOADADDR(.data); +__NDATA_IMAGE_START = LOADADDR(.ndata); + +EOF