From: Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
Date: Tue, 7 Apr 2020 14:08:46 +0000 (+0100)
Subject: arm: MVE Don't use lsll for 32-bit shifts scalar
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=094bc16bb4181a02177e1e14187b4c1c48bef0d5;p=gcc.git

arm: MVE Don't use lsll for 32-bit shifts scalar

After fixing the v[id]wdups using the "moving the wrap parameter" into the
top-end of a DImode operand using a shift, I noticed we were using lsll for
32-bit shifts in scalars, where we don't need to, as we can simply do a move,
  which is much better if we don't need to use the bottom part.

We can solve this in a better way, but for now this will do.

gcc/ChangeLog:
2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 48c9c48aad6..45825a881ba 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
+
 2020-04-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
 	* config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1a7ea0d701e..6d5560398da 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4422,7 +4422,8 @@
         operands[2] = force_reg (SImode, operands[2]);
 
       /* Armv8.1-M Mainline double shifts are not expanded.  */
-      if (arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2])))
+      if (arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2]))
+	  && (REG_P (operands[2]) || INTVAL(operands[2]) != 32))
         {
 	  if (!reg_overlap_mentioned_p(operands[0], operands[1]))
 	    emit_insn (gen_movdi (operands[0], operands[1]));