From: Daniel Benusovich <flyingmonkeys1996@gmail.com>
Date: Mon, 1 Apr 2019 02:53:37 +0000 (-0700)
Subject: Correct comment in TLB
X-Git-Tag: div_pipeline~2281
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0974b344427e697e73e1733967cd51e6e3366061;p=soc.git

Correct comment in TLB
---

diff --git a/TLB/src/TLB.py b/TLB/src/TLB.py
index aaa55da2..612ab93e 100644
--- a/TLB/src/TLB.py
+++ b/TLB/src/TLB.py
@@ -81,7 +81,7 @@ class TLB():
                         m.d.comb += [
                             write_L1.en.eq(1),
                             write_L1.addr.eq(self.address_L1),
-                            # The first argument is the LSB
+                            # The Cat places arguments from LSB -> MSB
                             write_L1.data.eq(Cat(self.pte, self.asid))
                         ]
                         # CAM_L1 Logic