From: Luke Kenneth Casson Leighton Date: Wed, 22 Jun 2022 14:41:43 +0000 (+0100) Subject: expected number of instructions is 1 (therefore PC after running is 4 not 8) X-Git-Tag: sv_maxu_works-initial~365 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=09db8b5102785d129b268a712006e6638b978353;p=openpower-isa.git expected number of instructions is 1 (therefore PC after running is 4 not 8) --- diff --git a/src/openpower/test/bitmanip/av_cases.py b/src/openpower/test/bitmanip/av_cases.py index 7e026ea4..3d512514 100644 --- a/src/openpower/test/bitmanip/av_cases.py +++ b/src/openpower/test/bitmanip/av_cases.py @@ -398,7 +398,7 @@ class AVTestCase(TestAccumulatorBase): e.intregs[5] = 0x3 self.add_case(Program(lst, bigendian), initial_regs, expected=e) - def cse_0_cprop(self): + def case_0_cprop(self): lst = ["cprop 3, 1, 2" ] lst = list(SVP64Asm(lst, bigendian)) reg_a = 0b000001 @@ -410,7 +410,7 @@ class AVTestCase(TestAccumulatorBase): initial_regs[2] = reg_b #initial_regs[4] = 0x9 #initial_regs[5] = 0x3 - e = ExpectedState(pc=8) + e = ExpectedState(pc=4) e.intregs[1] = reg_a e.intregs[2] = reg_b e.intregs[3] = reg_t