From: Benjamin Franzke <benjaminfranzke@googlemail.com>
Date: Mon, 30 May 2011 09:58:32 +0000 (+0200)
Subject: Add intel pci id lists
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=09f83ce4da3d8c6320929bdd7feacc9914b55ac6;p=mesa.git

Add intel pci id lists

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
---

diff --git a/Makefile b/Makefile
index f3c0a20a3c2..e77e64925d2 100644
--- a/Makefile
+++ b/Makefile
@@ -230,6 +230,7 @@ MAIN_FILES = \
 	$(DIRECTORY)/include/GL/vms_x_fix.h				\
 	$(DIRECTORY)/include/GL/wglext.h				\
 	$(DIRECTORY)/include/GL/wmesa.h					\
+	$(DIRECTORY)/include/pci_ids/*.h				\
 	$(DIRECTORY)/src/getopt/SConscript				\
 	$(DIRECTORY)/src/getopt/getopt*.[ch]				\
 	$(DIRECTORY)/src/glsl/Makefile					\
diff --git a/include/pci_ids/i810_pci_ids.h b/include/pci_ids/i810_pci_ids.h
new file mode 100644
index 00000000000..7f681925dc9
--- /dev/null
+++ b/include/pci_ids/i810_pci_ids.h
@@ -0,0 +1,4 @@
+CHIPSET(0x7121, I810, i8xx)
+CHIPSET(0x7123, I810_DC100, i8xx)
+CHIPSET(0x7125, I810_E, i8xx)
+CHIPSET(0x1132, I815, i8xx)
diff --git a/include/pci_ids/i915_pci_ids.h b/include/pci_ids/i915_pci_ids.h
new file mode 100644
index 00000000000..551c010a9a7
--- /dev/null
+++ b/include/pci_ids/i915_pci_ids.h
@@ -0,0 +1,15 @@
+CHIPSET(0x3577, I830_M, i8xx)
+CHIPSET(0x2562, 845_G, i8xx)
+CHIPSET(0x3582, I855_GM, i8xx)
+CHIPSET(0x2572, I865_G, i8xx)
+CHIPSET(0x2582, I915_G, i915)
+CHIPSET(0x258A, E7221_G, i915)
+CHIPSET(0x2592, I915_GM, i915)
+CHIPSET(0x2772, I945_G, i945)
+CHIPSET(0x27A2, I945_GM, i945)
+CHIPSET(0x27AE, I945_GME, i945)
+CHIPSET(0x29B2, Q35_G, i945)
+CHIPSET(0x29C2, G33_G, i945)
+CHIPSET(0x29D2, Q33_G, i945)
+CHIPSET(0xA011, IGD_GM, i945)
+CHIPSET(0xA001, IGD_G, i945)
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
new file mode 100644
index 00000000000..d37a2eed4b0
--- /dev/null
+++ b/include/pci_ids/i965_pci_ids.h
@@ -0,0 +1,27 @@
+CHIPSET(0x29A2, I965_G, i965)
+CHIPSET(0x2992, I965_Q, i965)
+CHIPSET(0x2982, I965_G_1, i965)
+CHIPSET(0x2972, I946_GZ, i965)
+CHIPSET(0x2A02, I965_GM, i965)
+CHIPSET(0x2A12, I965_GME, i965)
+CHIPSET(0x2A42, GM45_GM, g4x)
+CHIPSET(0x2E02, IGD_E_G, g4x)
+CHIPSET(0x2E12, Q45_G, g4x)
+CHIPSET(0x2E22, G45_G, g4x)
+CHIPSET(0x2E32, G41_G, g4x)
+CHIPSET(0x2E42, B43_G, g4x)
+CHIPSET(0x2E92, B43_G1, g4x)
+CHIPSET(0x0042, ILD_G, ilk)
+CHIPSET(0x0046, ILM_G, ilk)
+CHIPSET(0x0102, SANDYBRIDGE_GT1, snb_gt1)
+CHIPSET(0x0112, SANDYBRIDGE_GT2, snb_gt2)
+CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, snb_gt2)
+CHIPSET(0x0106, SANDYBRIDGE_M_GT1, snb_gt1)
+CHIPSET(0x0116, SANDYBRIDGE_M_GT2, snb_gt2)
+CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, snb_gt2)
+CHIPSET(0x010A, SANDYBRIDGE_S, snb_gt1)
+CHIPSET(0x0152, IVYBRIDGE_GT1, ivb_gt1)
+CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
+CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
+CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
+CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)