From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 24 Jul 2015 11:52:57 +0000 (+0200)
Subject: litepcie/frontend/dma: group loop index and count in loop_status register (avoid... 
X-Git-Tag: 24jan2021_ls180~2198
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0a115f609e444c4f9bfaa8c65410abf8ccf34720;p=litex.git

litepcie/frontend/dma: group loop index and count in loop_status register (avoid 2 register reads)
---

diff --git a/misoclib/com/litepcie/frontend/dma/common.py b/misoclib/com/litepcie/frontend/dma/common.py
index e54846cd..bda38302 100644
--- a/misoclib/com/litepcie/frontend/dma/common.py
+++ b/misoclib/com/litepcie/frontend/dma/common.py
@@ -28,11 +28,9 @@ class DMARequestTable(Module, AutoCSR):
         self._value = CSRStorage(aw+lw)
         self._we = CSR()
         self._loop_prog_n = CSRStorage()
-        self._index = CSRStatus(log2_int(depth))
+        self._loop_status = CSRStatus(32)
         self._level = CSRStatus(log2_int(depth))
-        self._loop = CSRStatus(16)
         self._flush = CSR()
-
         self.irq = Signal()
 
        # # #
@@ -41,8 +39,8 @@ class DMARequestTable(Module, AutoCSR):
         value = self._value.storage
         we = self._we.r & self._we.re
         loop_prog_n = self._loop_prog_n.storage
-        index = self._index.status
-        loop = self._loop.status
+        loop_index = self._loop_status.status[:log2_int(depth)]
+        loop_count = self._loop_status.status[16:]
         level = self._level.status
         flush = self._flush.r & self._flush.re
 
@@ -83,19 +81,19 @@ class DMARequestTable(Module, AutoCSR):
             source.length.eq(fifo.dout.length)
         ]
 
-        # index
+        # loop_index, loop_count
         # used by the software for synchronization in
         # "loop" mode
         self.sync += \
             If(flush,
-                index.eq(0),
-                loop.eq(0),
+                loop_index.eq(0),
+                loop_count.eq(0),
             ).Elif(source.stb & source.ack,
                 If(fifo.dout.start,
-                    index.eq(0),
-                    loop.eq(loop+1)
+                    loop_index.eq(0),
+                    loop_count.eq(loop_count+1)
                 ).Else(
-                    index.eq(index+1)
+                    loop_index.eq(loop_index+1)
                 )
             )
 
diff --git a/misoclib/com/litepcie/software/linux/kernel/flags.h b/misoclib/com/litepcie/software/linux/kernel/flags.h
index f548693f..744333a0 100644
--- a/misoclib/com/litepcie/software/linux/kernel/flags.h
+++ b/misoclib/com/litepcie/software/linux/kernel/flags.h
@@ -4,4 +4,7 @@
 /* dma */
 #define DMA_LOOPBACK_ENABLE 0x1
 
+#define DMA_TABLE_LOOP_INDEX 1 << 0
+#define DMA_TABLE_LOOP_COUNT 1 << 16
+
 #endif /* __HW_FLAGS_H */
diff --git a/misoclib/com/litepcie/software/linux/kernel/main.c b/misoclib/com/litepcie/software/linux/kernel/main.c
index d5ae258f..aa9b18d5 100644
--- a/misoclib/com/litepcie/software/linux/kernel/main.c
+++ b/misoclib/com/litepcie/software/linux/kernel/main.c
@@ -268,12 +268,12 @@ static int litepcie_dma_wait(LitePCIeState *s, struct litepcie_ioctl_dma_wait *m
     for (;;) {
         /* set current buffer */
         if (s->tx_dma_started) {
-            m->tx_buf_num = litepcie_readl(s, CSR_DMA_READER_TABLE_INDEX_ADDR);
+            m->tx_buf_num = (litepcie_readl(s, CSR_DMA_READER_TABLE_LOOP_STATUS_ADDR) & 0xffff);
         } else {
             m->tx_buf_num = 0;
         }
         if (s->rx_dma_started) {
-            m->rx_buf_num = litepcie_readl(s, CSR_DMA_WRITER_TABLE_INDEX_ADDR);
+            m->rx_buf_num = (litepcie_readl(s, CSR_DMA_WRITER_TABLE_LOOP_STATUS_ADDR) & 0xfffff);
         } else {
             m->rx_buf_num = 0;
         }