From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Sun, 25 Sep 2011 16:02:34 +0000 (+0200)
Subject: i915g: disable scissor in fast clear
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0a6131b15c874c076781a8dc347b4e51be15801a;p=mesa.git

i915g: disable scissor in fast clear

Docs say this is obeyed.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/src/gallium/drivers/i915/i915_clear.c b/src/gallium/drivers/i915/i915_clear.c
index aa453bce580..a0aba0201f5 100644
--- a/src/gallium/drivers/i915/i915_clear.c
+++ b/src/gallium/drivers/i915/i915_clear.c
@@ -102,15 +102,17 @@ i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
    if (i915->hardware_dirty)
       i915_emit_hardware_state(i915);
 
-   if (!BEGIN_BATCH(7 + 7)) {
+   if (!BEGIN_BATCH(1 + 7 + 7)) {
       FLUSH_BATCH(NULL);
 
       i915_emit_hardware_state(i915);
       i915->vbo_flushed = 1;
 
-      assert(BEGIN_BATCH(7 + 7));
+      assert(BEGIN_BATCH(1 + 7 + 7));
    }
 
+   OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
+
    OUT_BATCH(_3DSTATE_CLEAR_PARAMETERS);
    OUT_BATCH(clear_params | CLEARPARAM_CLEAR_RECT);
    /* Used for zone init prim */
@@ -130,8 +132,8 @@ i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
    OUT_BATCH_F(desty);
 
    /* Flush after clear, its expected to be a costly operation.
-    * This is not required, just a heuristic
-    */
+    * This is not required, just a heuristic, but without the flush we'd need to
+    * clobber the SCISSOR_ENABLE dynamic state. */
    FLUSH_BATCH(NULL);
 
    i915->last_fired_vertices = i915->fired_vertices;