From: lkcl <lkcl@web>
Date: Tue, 16 Aug 2022 00:49:25 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~854
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0a6bfed2a1541bd0948903ff43fc9d4b1b842855;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index 495148b6f..0098bb781 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -43,15 +43,16 @@ a number of different modes:
 * **Speculative fail-first** - where it makes sense to do so
 * **Structure Packing** - covered in SV by [[sv/remap]] and Pack/Unpack Mode.
 
-Also included in SVP64 LD/ST is both signed and unsigned Saturation,
-as well as Element-width overrides and Twin-Predication.
-
 *Despite being constructed from Scalar LD/ST none of these Modes
 exist or make sense in any Scalar ISA. They **only** exist in Vector ISAs*
 
+Also included in SVP64 LD/ST is both signed and unsigned Saturation,
+as well as Element-width overrides and Twin-Predication.
+
 Note also that Indexed [[sv/remap]] mode may be applied to both
 v3.0 LD/ST Immediate instructions *and* v3.0 LD/ST Indexed instructions.
-LD/ST-Indexed should not be conflated with Indexed REMAP mode.
+LD/ST-Indexed should not be conflated with Indexed REMAP mode: clarification
+is provided below.
 
 # Determining the LD/ST Modes