From: Chris Demetriou <cgd@google.com>
Date: Wed, 24 Oct 2001 21:08:34 +0000 (+0000)
Subject: 2001-10-24  Chris Demetriou  <cgd@broadcom.com>
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0a758a12213514ec64b95fcb325912e39d117fce;p=binutils-gdb.git

2001-10-24  Chris Demetriou  <cgd@broadcom.com>

        * config/tc-mips.c (hilo_interlocks, cop_interlocks): Make
        these evaluate to true if mips_arch indicates SB-1.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index da68f958cef..9ad0f91e317 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2001-10-24  Chris Demetriou  <cgd@broadcom.com>
+
+	* config/tc-mips.c (hilo_interlocks, cop_interlocks): Make
+	these evaluate to true if mips_arch indicates SB-1.
+
 2001-10-23  Alan Modra  <amodra@bigpond.net.au>
 
 	* as.c (parse_args): Print the date as well for --version.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 847ee2c8394..96f13a00c5b 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -258,6 +258,7 @@ static int mips_fp32 = 0;
    require nops to be inserted.  */
 
 #define hilo_interlocks (mips_arch == CPU_R4010                       \
+                         || mips_arch == CPU_SB1                      \
                          )
 
 /* Whether the processor uses hardware interlocks to protect reads
@@ -270,6 +271,7 @@ static int mips_fp32 = 0;
    (co-processor) interlocks.  */
 /* Itbl support may require additional care here.  */
 #define cop_interlocks (mips_arch == CPU_R4300                        \
+                        || mips_arch == CPU_SB1                       \
 			)
 
 /* Is this a mfhi or mflo instruction?  */