From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 27 Feb 2019 17:14:17 +0000 (+0000)
Subject: assign tests to signals
X-Git-Tag: ls180-24jan2020~1804
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0aea70cc291d6ab896f33d80f2f1892ac1c5dff8;p=ieee754fpu.git

assign tests to signals
---

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index e80c149e..1c5c1ea4 100644
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -214,10 +214,14 @@ class FPAddAlignMultiMod(FPState):
         m.d.comb += self.exp_eq.eq(0)
         m.d.comb += self.out_a.copy(self.in_a)
         m.d.comb += self.out_b.copy(self.in_b)
-        with m.If(self.in_a.e > self.in_b.e):
+        agtb = Signal(reset_less=True)
+        altb = Signal(reset_less=True)
+        m.d.comb += agtb.eq(self.in_a.e > self.in_b.e)
+        m.d.comb += altb.eq(self.in_a.e < self.in_b.e)
+        with m.If(agtb):
             m.d.comb += self.out_b.shift_down(self.in_b)
         # exponent of b greater than a: shift a down
-        with m.Elif(self.in_a.e < self.in_b.e):
+        with m.Elif(altb):
             m.d.comb += self.out_a.shift_down(self.in_a)
         # exponents equal: move to next stage.
         with m.Else():