From: Bill Schmidt Date: Wed, 4 Mar 2020 13:30:29 +0000 (-0600) Subject: rs6000: Fix -mpower9-vector -mno-altivec ICE (PR87560) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b0908c1f27d12a3cbbd3c9fd55aec1fe87586a6;p=gcc.git rs6000: Fix -mpower9-vector -mno-altivec ICE (PR87560) PR87560 reports an ICE when a test case is compiled with -mpower9-vector and -mno-altivec. This patch terminates compilation with an error when this combination (and other unreasonable ones) are requested. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Reported error is now: f951: Error: '-mno-altivec' turns off '-mpower9-vector' 2020-03-02 Bill Schmidt PR target/87560 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define. * rs6000.c (rs6000_disable_incompatible_switches): Add table entry for OPTION_MASK_ALTIVEC. --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b32bd446a45..b7c9d86c90c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2020-03-04 Bill Schmidt + + PR target/87560 + * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define. + * rs6000.c (rs6000_disable_incompatible_switches): Add table entry + for OPTION_MASK_ALTIVEC. + 2020-03-04 Jakub Jelinek PR debug/93888 diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 193d77eb954..ff1db6019de 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -101,6 +101,10 @@ | OPTION_MASK_FLOAT128_KEYWORD \ | OPTION_MASK_P8_VECTOR) +/* Flags that need to be turned off if -mno-altivec. */ +#define OTHER_ALTIVEC_MASKS (OTHER_VSX_VECTOR_MASKS \ + | OPTION_MASK_VSX) + #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) /* Deal with ports that do not have -mstrict-align. */ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 9910b27ed24..ecbf7ae0c59 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -23632,6 +23632,7 @@ rs6000_disable_incompatible_switches (void) { OPTION_MASK_P9_VECTOR, OTHER_P9_VECTOR_MASKS, "power9-vector" }, { OPTION_MASK_P8_VECTOR, OTHER_P8_VECTOR_MASKS, "power8-vector" }, { OPTION_MASK_VSX, OTHER_VSX_VECTOR_MASKS, "vsx" }, + { OPTION_MASK_ALTIVEC, OTHER_ALTIVEC_MASKS, "altivec" }, }; for (i = 0; i < ARRAY_SIZE (flags); i++)