From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 20 Jun 2020 11:02:07 +0000 (+0100)
Subject: import error
X-Git-Tag: 24jan2021_ls180~8
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b0ac1276ce0c8f1c831b7a8cbbb4089bfca8356;p=nmigen-soc.git

import error
---

diff --git a/nmigen_soc/wishbone/sram.py b/nmigen_soc/wishbone/sram.py
index ffb8f63..030ad90 100644
--- a/nmigen_soc/wishbone/sram.py
+++ b/nmigen_soc/wishbone/sram.py
@@ -1,7 +1,7 @@
 from nmigen import Elaboratable, Memory, Module
 from nmigen.utils import log2_int
 
-from nmigen.wishbone.bus import Interface
+from nmigen_soc.wishbone.bus import Interface
 
 
 __all__ = ["SRAM"]