From: Srinath Parvathaneni Date: Wed, 20 May 2020 12:20:55 +0000 (+0100) Subject: Add missing testsuite/Changelog for PR94595 bug fix. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b0ad7d0d0584b4668eb4fb148cfe988fdd88224;p=gcc.git Add missing testsuite/Changelog for PR94595 bug fix. --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9552d201b5e..49f8cd7cf9c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,62 @@ +2020-05-20 Srinath Parvathaneni + + PR target/94959 + * gcc.target/arm/mve/intrinsics/mve_vector_float2.c: Modify. + * gcc.target/arm/mve/intrinsics/mve_vldr.c: New test. + * gcc.target/arm/mve/intrinsics/mve_vldr_z.c: Likewise. + * gcc.target/arm/mve/intrinsics/mve_vstr.c: Likewise. + * gcc.target/arm/mve/intrinsics/mve_vstr_p.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_f16.c: Modify. + * gcc.target/arm/mve/intrinsics/vld1q_f32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_s16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_s8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_u16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_u8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_f16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_f32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_s16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_s8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_u16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vld1q_z_u8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrbq_s8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrbq_u8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_f16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_s16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_u16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_f32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vuninitializedq_float.c: Likewise. + * gcc.target/arm/mve/intrinsics/vuninitializedq_float1.c: Likewise. + * gcc.target/arm/mve/intrinsics/vuninitializedq_int.c: Likewise. + * gcc.target/arm/mve/intrinsics/vuninitializedq_int1.c: Likewise. + 2020-05-20 Richard Biener PR tree-optimization/95219