From: lkcl <lkcl@web>
Date: Wed, 29 Sep 2021 20:13:40 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3798
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b0ba41edbde5e0c05f409887c04ca79fd9d1a2e;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/dynamic_simd/logicops.mdwn b/3d_gpu/architecture/dynamic_simd/logicops.mdwn
index 8a51be53e..f44712a19 100644
--- a/3d_gpu/architecture/dynamic_simd/logicops.mdwn
+++ b/3d_gpu/architecture/dynamic_simd/logicops.mdwn
@@ -16,6 +16,9 @@ they are instead SIMD versions of:
      for i in range(64):
          result = result xor a[i] # one operand
 
+Each of the logic ops, "some bool any all xor" are a single bit for
+scalar, but for Partitioned SIMD produce one bit per lane.
+
 # Requirements
 
 Given a signal width (typically 64) and given an array of "Partition Points" (typically 7) that break the signal down into an arbitrary permutaion of 8 bit to 64 bit independent SIMD results, compute the following: