From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 3 Jun 2020 17:29:34 +0000 (+0100)
Subject: add a simple core, not intended for production use
X-Git-Tag: div_pipeline~629
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b1c8d4a416274489ed6f41c4b96d97baf9a024f;p=soc.git

add a simple core, not intended for production use
---

diff --git a/src/soc/fu/compunits/compunits.py b/src/soc/fu/compunits/compunits.py
index 5f8ea2bd..c8e4a2bc 100644
--- a/src/soc/fu/compunits/compunits.py
+++ b/src/soc/fu/compunits/compunits.py
@@ -151,6 +151,7 @@ class AllFunctionUnits(Elaboratable):
     def ports(self):
         return list(self)
 
+
 def tst_single_fus_il():
     for (name, kls) in (('alu', ALUFunctionUnit),
                         ('cr', CRFunctionUnit),
diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py
new file mode 100644
index 00000000..ea26a0fe
--- /dev/null
+++ b/src/soc/simple/core.py
@@ -0,0 +1,4 @@
+from nmigen import Elaboratable, Module
+
+from soc.fu.compunits.compunits import AllFunctionUnits
+from soc.regfile.regfiles import RegFiles