From: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Date: Fri, 30 Aug 2019 20:49:33 +0000 (-0700)
Subject: pan/midgard: Remove mir_opt_post_move_eliminate
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0b225f1892a677d9b735782c9d6aac4ee5d33c56;p=mesa.git

pan/midgard: Remove mir_opt_post_move_eliminate

This optimization depended on RA running before scheduling. It therefore
no longer applies and is now unused.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
---

diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h
index 82ccde658e3..97795b25cb9 100644
--- a/src/panfrost/midgard/compiler.h
+++ b/src/panfrost/midgard/compiler.h
@@ -650,7 +650,6 @@ bool midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
 bool midgard_opt_varying_projection(compiler_context *ctx, midgard_block *block);
 bool midgard_opt_dead_code_eliminate(compiler_context *ctx, midgard_block *block);
 bool midgard_opt_dead_move_eliminate(compiler_context *ctx, midgard_block *block);
-void midgard_opt_post_move_eliminate(compiler_context *ctx, midgard_block *block, struct ra_graph *g);
 
 void midgard_lower_invert(compiler_context *ctx, midgard_block *block);
 bool midgard_opt_not_propagate(compiler_context *ctx, midgard_block *block);
diff --git a/src/panfrost/midgard/midgard_opt_dce.c b/src/panfrost/midgard/midgard_opt_dce.c
index 5d23923b8e6..764a5ff6030 100644
--- a/src/panfrost/midgard/midgard_opt_dce.c
+++ b/src/panfrost/midgard/midgard_opt_dce.c
@@ -85,51 +85,3 @@ midgard_opt_dead_move_eliminate(compiler_context *ctx, midgard_block *block)
 
         return progress;
 }
-
-/* An even further special case - to be run after RA runs but before
- * scheduling, eliminating moves that end up being useless even though they
- * appeared meaningful in the SSA. Part #2 of register coalescing. */
-
-void
-midgard_opt_post_move_eliminate(compiler_context *ctx, midgard_block *block, struct ra_graph *g)
-{
-        mir_foreach_instr_in_block_safe(block, ins) {
-                if (ins->type != TAG_ALU_4) continue;
-                if (ins->compact_branch) continue;
-                if (!OP_IS_MOVE(ins->alu.op)) continue;
-                if (ins->dont_eliminate) continue;
-
-                /* Check we're to the same place post-RA */
-                unsigned iA = ins->dest;
-                unsigned iB = ins->src[1];
-
-                if ((iA == ~0) || (iB == ~0)) continue;
-
-                unsigned A = iA >= SSA_FIXED_MINIMUM ?
-                        SSA_REG_FROM_FIXED(iA) : 
-                        ra_get_node_reg(g, iA);
-
-                unsigned B = iB >= SSA_FIXED_MINIMUM ?
-                        SSA_REG_FROM_FIXED(iB) : 
-                        ra_get_node_reg(g, iB);
-
-                if (A != B) continue;
-
-                /* Check we're in the work zone. TODO: promoted
-                 * uniforms? */
-                if (A >= 16) continue;
-
-                /* Ensure there aren't side effects */
-                if (mir_nontrivial_source2_mod(ins)) continue;
-                if (mir_nontrivial_outmod(ins)) continue;
-                if (ins->mask != 0xF) continue;
-
-                /* We do need to rewrite to facilitate pipelining/scheduling */
-                mir_rewrite_index(ctx, ins->src[1], ins->dest);
-
-                /* We're good to go */
-                mir_remove_instruction(ins);
-
-        }
-
-}